US2019391735A1PendingUtilityA1

Predictive background updating

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Assignee: GRAPHISOFT SEPriority: May 4, 2015Filed: Sep 3, 2019Published: Dec 26, 2019
Est. expiryMay 4, 2035(~8.8 yrs left)· nominal 20-yr term from priority
G06F 2212/455G06T 19/20G06F 3/04815G06T 17/05G06F 3/04847G06F 12/0875
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Claims

Abstract

Predictive background updating is disclosed, which takes advantage of a processors' unused capacity to build up live model views in advance. Open model views of the project can be continuously updated in the background. In this manner, changing model views is implemented more rapidly, regardless of the size and complexity of the BIM model, such as when the view updates in the background have finished prior to the change in views.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A system for data modeling, comprising:
 a boundary representation (BREP) cache operating on a processor and configured to store a plurality of building information model (BIM) elements; and   an active window cache operating on the processor and configured to store an active window view and a separate inactive window cache operating on the processor and configured to store each of a plurality of inactive window views, wherein the inactive window views are updated by the processor in the inactive window cache in a predetermined order and wherein an active window view cache BIM element and an inactive window view cache BIM element are each associated to a single BIM element in the BREP cache.   
     
     
         22 . The system of  claim 21  wherein the BIM element stored in the BREP cache includes a separate associated BIM element for each of the plurality of views. 
     
     
         23 . The system of  claim 21  wherein one processor core of a multi-processor system is dedicated for user interactions with the BREP cache. 
     
     
         24 . The system of  claim 21  wherein one processor core of a multi-processor system is dedicated to updating the active window view. 
     
     
         25 . The system of  claim 21  wherein one processor core of the multi-processor system is dedicated to updating one of the plurality of inactive window views. 
     
     
         26 . The system of  claim 21  further comprising an update system is configured to update changes made to the active window cache to the inactive window cache. 
     
     
         27 . The system of  claim 21  further comprising an update system operating on the processor and configured to update changes made to the active window cache to the inactive window cache using a processor core of a multi-processor system. 
     
     
         28 . The system of  claim 21  further comprising an update system operating on the processor and configured to update changes made to the active window cache to a first inactive window in the inactive window cache using a first processor core of a multi-processor system and to update changes made to the active window cache to a second inactive window in the inactive window cache using a second processor core of the multi-processor system. 
     
     
         29 . The system of  claim 28  wherein the first inactive window is a most recently used inactive window, and the second inactive window is the second most recently used inactive window. 
     
     
         30 . The system of  claim 21  wherein an update system operating on the processor implements the updates using a plurality of discrete processing jobs, and the changes made to the view in the one or more inactive windows are implemented in an associated cache that is incrementally built up by one or more of the discrete processing jobs. 
     
     
         31 . The system of  claim 30  wherein data stored in the associated cache is stored in one or more dynamic memory devices during each of the discrete processing jobs, and is also stored in one or more static memory devices after completion of each discrete processing job. 
     
     
         32 . A non-transitory computer readable medium comprising a set of computer instructions executable by a processor for operating a system, the computer instructions configured to:
 update changes made to a view in an active window to a view in a first inactive window of two or more inactive windows using the processor;   update the changes made to the view in the active window to the view in a second inactive window of the two or more inactive windows using the processor after completion of the updates to the first inactive window; and   wherein the inactive window views are updated in a predetermined order.   
     
     
         33 . The non-transitory computer readable medium of  claim 32 , wherein the first inactive window is a most recently used inactive window, and the second inactive window is the second most recently used inactive window. 
     
     
         34 . The non-transitory computer readable medium of  claim 32  wherein the processor is a first processor of a multi-processor system and a second processor is dynamically selected according to available capacity of one or more processor cores of the multi-processor system. 
     
     
         35 . The non-transitory computer readable medium of  claim 32  wherein wherein the processor is a first processor of a multi-processor system, one processor core of the multi-processor system is dedicated for user interactions and where other processor cores of the multi-processor system are dedicated to updating one of the plurality of views. 
     
     
         36 . The non-transitory computer readable medium of  claim 32  wherein the processor is a first processor of a multi-processor system and a second processor is dynamically selected according to a predetermined criteria. 
     
     
         37 . The non-transitory computer readable medium of  claim 32  wherein the processor is a first processor of a multi-processor system and a second processor is dynamically selected according to a processor code loading. 
     
     
         38 . The non-transitory computer readable medium of  claim 32  wherein the processor a first processor of a multi-processor system and a second processor is dynamically selected according to a processor core loading. 
     
     
         39 . The non-transitory computer readable medium of  claim 32  wherein the processor is a first processor of a multi-processor system and a second processor is dynamically selected according to a thread loading.

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