US2020013951A1PendingUtilityA1
Pcram structure
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jul 6, 2018Filed: Apr 26, 2019Published: Jan 9, 2020
Est. expiryJul 6, 2038(~11.9 yrs left)· nominal 20-yr term from priority
Inventors:Jau-Yi Wu
H01L 45/1675H01L 45/1683H01L 27/2481H01L 45/06H01L 45/126H01L 45/1233H01L 27/2409G11C 13/0004H10N 70/063H10N 70/231H10N 70/8413H10N 70/841H10N 70/066H10B 63/80H10N 70/8613H10B 63/20H10N 70/8828H10B 63/84H10N 70/826
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Claims
Abstract
A memory device includes the following items. A substrate. A bottom electrode disposed over the substrate. An insulating layer disposed over the bottom electrode, the insulating layer having a through hole defined in the insulating layer. A heater disposed in the through hole. A phase change material layer disposed over the heater. A selector layer disposed over the phase change material layer. An intermediate layer disposed over the through hole. Also, a metal layer disposed over the selector layer. The metal layer is wider than the phase change material layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A memory device comprising:
a substrate; a bottom electrode disposed over the substrate; an insulating layer disposed over the bottom electrode, the insulating layer having a through hole defined in the insulating layer; a heater disposed in the through hole; a phase change material layer disposed over the heater; a selector layer disposed over the phase change material layer; an intermediate layer over the through hole; and a metal layer disposed over the selector layer.
2 . The memory device of claim 1 , wherein the intermediate layer is wider than a diameter of the through hole.
3 . The memory device of claim 1 , wherein the metal layer is wider than the phase change material layer.
4 . The memory device of claim 1 , wherein the phase change material layer is disposed in the through hole.
5 . The memory device of claim 1 , wherein the selector layer is disposed in the through hole.
6 . The memory device of claim 1 , wherein the intermediate layer contacting the metal layer.
7 . The memory device of claim 1 , wherein the intermediate layer is formed of at least one of carbon and tungsten.
8 . The memory device of claim 1 , wherein the metal layer functions as a top electrode.
9 . A memory device comprising:
a substrate; a bottom electrode disposed over the substrate; a first heater disposed over the bottom electrode; a first phase change material layer disposed over the first heater; a first selector layer disposed over the first phase change material layer; an intermediate layer disposed over the first selector layer; a metal layer disposed over the intermediate layer; a second selector layer disposed over the metal layer; a second heater and a second phase change material layer disposed over the second selector layer; a top electrode disposed over the second heater and the second phase change material layer; and an insulating layer between the bottom electrode and the top electrode, enclosing, with the bottom and top electrodes, the first and second heaters, the first and second selector layers, the first and second phase change material layers, and the metal layer.
10 . The memory device of claim 9 , wherein the intermediate layer extends wider than the first and second heaters.
11 . The memory device of claim 9 , wherein the metal layer is wider than the first phase change material layer.
12 . The memory device of claim 9 , wherein the second heater is disposed over the second phase change material layer.
13 . The memory device of claim 9 , wherein the second phase change material layer is disposed over the second heater.
14 . The memory device of claim 9 , wherein the intermediate layer is wider than the first and second heaters.
15 . The memory device of claim 9 , wherein the intermediate layer contacts the metal layer.
16 . The memory device of claim 9 , wherein the intermediate layer is formed of at least one of carbon and tungsten.
17 . A method of manufacturing a memory device, comprising:
forming a bottom electrode over a substrate; forming an insulating layer over the bottom electrode; forming a through hole in the insulating layer; forming a heater in the through hole; forming a phase change material layer over the heater; forming a selector layer over the phase change material layer; forming an intermediate layer over the selector layer; and forming a metal layer over the intermediate layer.
18 . The method of manufacturing the memory device of claim 17 , wherein the intermediate layer contacts the metal layer.
19 . The method of manufacturing the memory device of claim 17 , wherein the phase change material layer is formed in the through hole.
20 . The method of manufacturing the memory device of claim 17 , wherein the intermediate layer is formed of at least at least one of carbon and tungsten.Join the waitlist — get patent alerts
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