System and method for providing latency protection for trading orders
Abstract
A system for managing trading orders comprises a memory operable to store an order associated with a first price. The system further comprises a processor communicatively coupled to the memory and operable to identify a latency value. The processor is further operable to receive a counterorder and to identify a potential trade associated with the order and the counterorder, the potential trade based at least in part on the first price. If the latency value satisfies a configurable condition, the processor is further operable to initiate a configurable period of time. If the potential trade is not valid upon expiration of the configurable period, the processor is further operable to prevent the execution of the potential trade.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . An apparatus comprising:
a memory; at least one processor configured to: calculate a latency value that represents delays in transmission or processing of trading orders; receive an order; receive a counter-order; identify a potential trade associated with the order and the counter-order; determine whether the latency value satisfies a threshold time period; responsive to determining that the latency value satisfies the threshold time period and responsive to identifying the potential trade, initiate a timer; determine whether the potential trade is valid upon expiration of the timer; and responsive to determining that the potential trade is not valid upon expiration of the timer, prevent execution of the potential trade.
3 . The apparatus of claim 2 , wherein the at least one processor is further configured to generate a timer queue in the memory and insert a record of the potential trade in the timer queue.
4 . The apparatus of claim 3 , wherein the at least one processor is further configured to keep the record of the potential trade in the memory until the timer expires.
5 . The apparatus of claim 2 , wherein expiration of the timer is configurable.
6 . The apparatus of claim 2 , wherein the at least one processor is configured to determine that the potential trade is not valid in response to determining that the counter-order was cancelled before the timer expired.
7 . The apparatus of claim 2 , wherein the at least one processor is further configured to generate an inbound queue in the memory and insert the counter-order in the inbound queue in response to receiving the counter-order.
8 . The apparatus of claim 7 , wherein the at least one processor is further configured to remove the counter-order from the inbound queue in response to determining that the potential trade is no longer valid.
9 . The apparatus of claim 2 , wherein the at least one processor is further configured to calculate the latency value based at least in part on a time it takes to acknowledge receipt of a given trading order transmitted from a server.
10 . A method comprising:
calculating, by at least one processor, a latency value that represents delays in transmission or processing of trading orders; receiving, by the at least one processor, an order; receiving, by the at least one processor, a counter-order; identifying, by the at least one processor, a potential trade associated with the order and the counter-order; determining, by the at least one processor, whether the latency value satisfies a threshold time period; responsive to determining that the latency value satisfies the threshold time period and responsive to identifying the potential trade, initiating, by the at least one processor, a timer; determining, by the at least one processor, whether the potential trade is valid upon expiration of the timer; and responsive to determining that the potential trade is not valid upon expiration of the timer, preventing, by the at least one processor, execution of the potential trade.
11 . The method of claim 10 , further comprising generating, by the at least one processor, a timer queue in a memory and insert a record of the potential trade in the timer queue.
12 . The method of claim 11 , further comprising keeping, by the at least one processor, the record of the potential trade in the memory until the timer expires.
13 . The method of claim 10 , wherein expiration of the timer is configurable.
14 . The method of claim 10 , further comprising determining, by the at least one processor, that the potential trade is not valid in response to determining that the counter-order was cancelled before the timer expired.
15 . The method of claim 10 , further comprising generating, by the at least one processor, an inbound queue in a memory and insert the counter-order in the inbound queue in response to receiving the counter-order.
16 . The method of claim 15 , further comprising removing, by the at least one processor, the counter-order from the inbound queue in response to determining that the potential trade is no longer valid.
17 . The method of claim 10 , further comprising calculating, by the at least one processor, the latency value based at least in part on a time it takes to acknowledge receipt of a given trading order transmitted from a server.Join the waitlist — get patent alerts
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