US2020083662A1PendingUtilityA1
Iii-v chip preparation and integration in silicon photonics
Est. expiryMay 11, 2036(~9.8 yrs left)· nominal 20-yr term from priority
Inventors:Damien Lambert
H10W 72/019H01S 5/0217G02B 6/136G02B 6/4201G02B 6/12004G02B 2006/12097G02B 2006/12061G02B 6/122G02B 6/42G02B 6/4245H01S 2301/176G02B 6/4202G02B 6/4244G02B 2006/12176H01S 5/02268H01L 24/03H01S 5/02296H01S 5/0226H01S 5/02375H01S 5/02257H01S 5/0236H01S 5/0234H01S 5/0237
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Claims
Abstract
A composite semiconductor laser is made by securing a III-V wafer to a transfer wafer. A substrate of the III-V wafer is removed, and the III-V wafer is etched into a plurality of chips while the III-V wafer is secured to the transfer wafer. The transfer wafer is singulated. A portion of the transfer wafer is used as a handle for bonding the chip in a recess of a silicon device. The chip is used as a gain medium for the semiconductor laser.
Claims
exact text as granted — not AI-modified1 . A semiconductor laser comprising:
a platform, the platform comprising:
a substrate, the substrate forming a floor,
a device layer, wherein:
the device layer forms walls,
a recess in the platform is defined by the floor and the walls, and
an optical waveguide is formed in the device layer; and
a chip bonded in the recess to the floor of the substrate, wherein:
the chip comprises a facet,
the facet is an etched facet,
the chip comprises an active region, and
the active region of the chip is optically aligned with the optical waveguide in the device layer so that the semiconductor laser is configured to guide an optical beam from the active region of the chip, through the facet of the chip, through a wall of the device layer, and into the optical waveguide.
2 . The semiconductor laser of claim 1 , wherein:
the chip comprises a waveguide ridge to couple light out the facet, and the facet is not orthogonal to the waveguide ridge.
3 . The semiconductor laser of claim 1 , wherein the chip has a non-parallelogram shape.
4 . The semiconductor laser of claim 1 , wherein:
the chip has a length equal to or greater than 0.1 μm and equal to or less than 15 μm, and/or the chip has a width equal to or greater than 0.1 μm and equal to or less than 15 μm.
5 . The apparatus of claim 7 , wherein the chip is garnet.
6 . The semiconductor laser of claim 1 , wherein the etched facet is curved.
7 . An apparatus comprising:
a platform, the platform comprising:
a device layer, wherein walls of the device layer form an opening in the device layer; and
a waveguide formed in the device layer; and
a chip bonded to the platform, wherein
the chip is within the opening of the device layer;
the chip comprises a facet;
the facet is an etched facet; and
the chip is optically aligned with the waveguide in the device layer so that an optical beam is guided through the facet of the chip and into the waveguide.
8 . The apparatus of claim 7 , wherein:
the platform comprises a substrate forming a floor; the device layer forms walls; a recess in the platform is defined by the floor and the walls; the chip comprises an active region; the active region is a gain region for a laser; and the active region of the chip is optically aligned with the waveguide so that the apparatus is configured to guide the optical beam from the active region of the chip, through the facet of the chip, through a wall of the device layer, and into the waveguide.
9 . The apparatus of claim 7 , wherein the chip is a gain chip for a laser.
10 . The apparatus of claim 7 , wherein:
the chip comprises a waveguide ridge to couple light out the facet, and the facet is not orthogonal to the waveguide ridge.
11 . The apparatus of claim 7 , wherein:
the chip comprises a waveguide ridge to couple light out the facet, and the facet is not orthogonal to the waveguide ridge.
12 . The apparatus of claim 7 , wherein the etched facet is curved.
13 . An apparatus comprising:
a platform comprising a waveguide; and a chip comprising an etched facet, wherein light is configured to pass through the etched facet and into the waveguide.
14 . The apparatus of claim 13 , wherein the waveguide is a semiconductor waveguide.
15 . The apparatus of claim 13 , wherein:
the platform comprises:
a substrate forming a floor;
a device layer, wherein:
the device layer forms walls;
a recess in the platform is defined by the floor and the walls; and
the waveguide is formed in the device layer; and
the chip comprises an active region; and
the active region of the chip is optically aligned with the waveguide so that apparatus is configured to guide an optical beam from the active region of the chip, through the etched facet of the chip, through a wall of the device layer, and into the waveguide.
16 . The apparatus of claim 13 , wherein the platform is made of silicon.
17 . The apparatus of claim 13 , wherein:
the chip comprises a waveguide ridge to couple light out the etched facet, and the etched facet is not orthogonal to the waveguide ridge.
18 . The apparatus of claim 13 , wherein:
the chip has a length equal to or greater than 0.1 μm and equal to or less than 15 μm, and/or the chip has a width equal to or greater than 0.1 μm and equal to or less than 15 μm.
19 . The apparatus of claim 13 , wherein the chip is garnet.
20 . The apparatus of claim 13 , wherein the chip has a non-parallelogram shape.Cited by (0)
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