US2020089300A1PendingUtilityA1

Load line regulation via clamping voltage

Assignee: MICROSOFT TECHNOLOGY LICENSING LLCPriority: Aug 10, 2017Filed: Nov 22, 2019Published: Mar 19, 2020
Est. expiryAug 10, 2037(~11 yrs left)· nominal 20-yr term from priority
G05F 1/462G06F 1/26G06F 1/28G05F 1/468
52
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Claims

Abstract

A computing device is provided that includes a processor, a primary power supply, and a voltage regulation module. The voltage regulation module is configured to determine a load line for the processor and monitor a voltage and a current to the processor. While monitoring the voltage and current, the voltage regulation module is further configured to regulate the voltage to the processor to trend toward a voltage setpoint defined by the load line. While regulating the voltage, the voltage regulation module is further configured to clamp the load line at a clamping voltage to limit the regulated voltage output by the voltage regulation module from falling below a predetermined device minimum operation voltage when the monitored current exceeds a device maximum current value. The voltage regulation module is further configured to output electrical power at the regulated voltage to the processor.

Claims

exact text as granted — not AI-modified
1 . A method performed by a voltage regulation module for a computing device, the method comprising:
 receiving electrical power from a power supply of the computing device;   outputting electrical power at a regulated voltage to a processor of the computing device; and   adjusting the regulated voltage of the electrical power output to the processor based on a current of the electrical power consumed by the processor by:
 reducing the regulated voltage as the current increases until reaching a target voltage, and 
 upon the regulated voltage reaching the target voltage at a given current value, maintaining the regulated voltage at the target voltage as the current of the electrical power consumed by the processor continues to increase beyond the given current value. 
   
     
     
         2 . The method of  claim 1 , wherein reducing the regulated voltage as the current increases until reaching the target voltage includes:
 reducing the regulated voltage according to a voltage-current relationship with the current until reaching the target voltage;   wherein the voltage-current relationship and the target voltage are defined by a load line definition stored at the voltage regulation module.   
     
     
         3 . The method of  claim 2 , further comprising:
 adjusting the load line definition responsive to feedback from at least one of a current sensing loop or a voltage sensing loop;   wherein adjusting the load line definition includes adjusting the voltage-current relationship, adjusting the target voltage, or adjusting both the voltage-current relationship and the target voltage.   
     
     
         4 . The method of  claim 1 , wherein reducing the regulated voltage as the current increases until reaching the target voltage includes:
 reducing the regulated voltage according to an inverse linear relationship with the current until reaching the target voltage.   
     
     
         5 . The method of  claim 1 , wherein reducing the regulated voltage as the current increases until reaching the target voltage includes:
 reducing the regulated voltage according to an inverse nonlinear relationship with the current until reaching the target voltage.   
     
     
         6 . The method of  claim 1 , wherein reducing the regulated voltage as the current increases until reaching the target voltage includes:
 responsive to a first condition, reducing the regulated voltage according to a first voltage-current relationship with the current until reaching the target voltage;   responsive to a second condition that differs from the first condition, reducing the regulated voltage according to a second voltage-current relationship with the current until reaching the target voltage;   wherein the first condition and the second condition include different levels of capacitive wear of one or more capacitors of the voltage regulation module.   
     
     
         7 . The method of  claim 1 , further comprising:
 adjusting the target voltage responsive to a level of capacitive wear of one or more capacitors of the voltage regulation module.   
     
     
         8 . The method of  claim 1 , wherein the target voltage is one of a plurality of target voltages;
 wherein each of the plurality of target voltages correspond to a different power state of the processor; and   wherein the method further comprises:
 selecting the target voltage from the plurality of target voltages based on the identified power state of the processor. 
   
     
     
         9 . The method of  claim 1 , further comprising:
 measuring the regulated voltage of the electrical power output to the processor via a voltage sensing loop;   wherein the target voltage is a device minimum operating voltage for the processor to operate at a given frequency.   
     
     
         10 . The method of  claim 1 , wherein adjusting the regulated voltage of the electrical power output to the processor based on the current of the electrical power consumed by the processor further includes:
 increasing the regulated voltage from the target voltage as the current of the electrical power consumed by the processor decreases below the given current value.   
     
     
         11 . A voltage regulation module for a computing device, comprising:
 an electronic controller configured to:
 receive electrical power from a power supply of the computing device; 
 output electrical power at a regulated voltage to a processor of the computing device; and 
 adjust the regulated voltage of the electrical power output to the processor based on a current of the electrical power consumed by the processor by:
 reducing the regulated voltage as the current increases until reaching a target current, and 
 upon the current reaching the target current at a given regulated voltage value, maintaining the regulated voltage at the given regulated voltage value as the current of the electrical power consumed by the processor continues to increase beyond the target current. 
 
   
     
     
         12 . The voltage regulation module of  claim 11 , wherein reducing the regulated voltage as the current increases until reaching the target current includes:
 reducing the regulated voltage according to a voltage-current relationship with the current until reaching the target current;   wherein the voltage-current relationship and the target current are defined by a load line definition stored at the voltage regulation module.   
     
     
         13 . The voltage regulation module of  claim 11 , wherein reducing the regulated voltage as the current increases until reaching the target current includes:
 reducing the regulated voltage according to an inverse linear relationship with the current until reaching the target current.   
     
     
         14 . The voltage regulation module of  claim 11 , wherein reducing the regulated voltage as the current increases until reaching the target current includes:
 reducing the regulated voltage according to an inverse nonlinear relationship with the current until reaching the target current.   
     
     
         15 . The voltage regulation module of  claim 11 , wherein the electronic controller is further configured to:
 measure the current of the electrical power consumed by the processor via a current sensing loop;   wherein the target current is a device maximum current value for the processor.   
     
     
         16 . The voltage regulation module of  claim 15 , wherein the electronic controller is configured to define a voltage-current relationship between the regulated voltage and the current consumed by the processor based on the device maximum current value. 
     
     
         17 . A computing system, comprising:
 one or more storage devices having instructions stored thereon executable by one or more logic processors to:
 adjust, via a voltage regulation module, a regulated voltage of electrical power output to a processor based on a current of the electrical power consumed by the processor by:
 reducing the regulated voltage as the current consumed by the processor increases until reaching a target voltage, 
 upon the regulated voltage reaching the target voltage at a given current value, maintaining the regulated voltage at the target voltage as the current of the electrical power consumed by the processor continues to increase beyond the given current value, and 
 increasing the regulated voltage from the target voltage as the current of the electrical power consumed by the processor decreases below the given current value. 
 
   
     
     
         18 . The computing system of  claim 17 , wherein the instructions are further executable by one or more logic processors to:
 adjust the regulated voltage according to a voltage-current relationship with the current;   wherein the voltage-current relationship and the target voltage are defined by a load line definition stored at the one or more storage devices.   
     
     
         19 . The computing system of  claim 18 , wherein the instructions are further executable by the one or more logic processors to:
 adjust the load line definition responsive to feedback from at least one of:   a current sensing loop that measures the regulated voltage output to the processor, or
 a voltage sensing loop that measures the current consumed by the processor; 
   wherein the load line definition is adjusted by adjusting the voltage-current relationship, adjusting the target voltage, or adjusting both the voltage-current relationship and the target voltage.   
     
     
         20 . The computing system of  claim 17 , wherein the target voltage is one of a plurality of target voltages;
 wherein each of the plurality of target voltages correspond to a different power state of the processor; and   wherein the instructions are further executable by the one or more logic devices to select the target voltage from the plurality of target voltages based on the identified power state of the processor.

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