Semiconductor device

Abstract

According to one embodiment, a semiconductor device comprises a first nitride semiconductor layer on a substrate and a second nitride semiconductor layer on the first nitride semiconductor layer. The second nitride semiconductor layer has a larger bandgap than the first nitride semiconductor layer. Source and drain electrodes are on the second nitride semiconductor layer. A gate electrode is between the source electrode and the drain electrode. A third nitride semiconductor layer of p-type conductivity is on the second nitride semiconductor layer between the drain electrode and the gate electrode and spaced from the drain electrode.

What is claimed is: 
     
         1 . A semiconductor device, comprising: a first nitride semiconductor layer on a substrate;
 a second nitride semiconductor layer on the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;   a source electrode on the second nitride semiconductor layer;   a drain electrode on the second nitride semiconductor layer;   a gate electrode between the source electrode and the drain electrode; and   a third nitride semiconductor layer of p-type conductivity on the second nitride semiconductor layer between the drain electrode and the gate electrode and spaced from the drain electrode.   
     
     
         2 . The semiconductor device according  claim 1 , wherein when a width d 2  of the third nitride semiconductor layer in a direction parallel to a plane of the substrate is subtracted from a shortest distance d 1  between the drain electrode and the gate electrode, the difference is within a range of 0.5 μm to 2 μm, endpoint inclusive. 
     
     
         3 . The semiconductor device according  claim 1 , wherein a thickness of the third nitride semiconductor layer on the second nitride semiconductor is 40 nm or less. 
     
     
         4 . The semiconductor device according to  claim 1 , further comprising:
 an insulating film between the gate electrode and the first nitride semiconductor, between the gate electrode and the second nitride semiconductor, and between the gate electrode and the third nitride semiconductor, a portion of covering the third nitride semiconductor layer such that the third nitride semiconductor layer is between the portion and second nitride semiconductor layer.   
     
     
         5 . The semiconductor device according to  claim 1 , wherein the gate electrode extends in a trench from an upper surface of the second nitride semiconductor layer into the second nitride semiconductor layer. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the third nitride semiconductor layer includes at least one of magnesium, beryllium, carbon, or zinc as a dopant. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein
 a first portion of the third nitride semiconductor layer is between the gate electrode and the second nitride semiconductor layer, and   a second portion of the third nitride semiconductor layer adjacent to the first portion extends along an upper surface of the second nitride semiconductor to be closer to the drain electrode and a drain-side end portion of the gate electrode.   
     
     
         8 . The semiconductor device according to  claim 1 , wherein an upper surface of the third nitride semiconductor layer is substantially coplanar with an upper surface of the second nitride semiconductor layer. 
     
     
         9 . The semiconductor device according  claim 8 , wherein when a width d 2  of the third nitride semiconductor layer in a direction parallel to a plane of the substrate is subtracted from a shortest distance d 1  between the drain electrode and the gate electrode the difference is within a range of 0.5 μm to 2 μm, endpoint inclusive. 
     
     
         10 . The semiconductor device according to  claim 1 , further comprising:
 a cap layer of a p-type nitride semiconductor material between the gate electrode and the second nitride semiconductor layer.   
     
     
         11 . The semiconductor device according to  claim 10 , wherein the third nitride semiconductor layer directly contacts the second nitride semiconductor layer. 
     
     
         12 . The semiconductor device according to  claim 1 , wherein the third nitride semiconductor layer directly contacts the second nitride semiconductor layer. 
     
     
         13 . A semiconductor device, comprising:
 a first nitride semiconductor layer on a substrate;   a source electrode on the first nitride semiconductor layer;   a drain electrode on the first nitride semiconductor layer;   a gate electrode between the source electrode and the drain electrode;   a second nitride semiconductor layer between the first nitride semiconductor layer and the drain electrode and having a larger bandgap than the first nitride semiconductor layer;   a third nitride semiconductor layer directly on the first nitride semiconductor layer, a lateral position of the third nitride semiconductor layer being between a lateral position of a drain-side edge of the gate electrode and a lateral position of a gate-side edge of the drain electrode, a lateral surface of third nitride semiconductor layer directly contacting the second nitride semiconductor layer, the third nitride semiconductor layer having a bandgap larger than the first nitride semiconductor layer and less than or equal to the second nitride semiconductor layer; and   a fourth nitride semiconductor layer between the first nitride semiconductor layer and the source electrode and having a larger bandgap than the first nitride semiconductor layer and the third nitride semiconductor layer.   
     
     
         14 . The semiconductor device according  claim 13 , wherein when a width d 3  of the third nitride semiconductor layer in a direction parallel to a plane of the substrate is subtracted from a shortest distance d 1  between the drain electrode and the gate electrode, the difference is within a range of 0.5 μm to 2 μm, endpoint inclusive. 
     
     
         15 . The semiconductor device according  claim 13 , wherein a ratio t 1 /t 3  for a thickness t 1  of the second nitride semiconductor layer from the first nitride semiconductor layer to an uppermost surface and a thickness t 3  of the third nitride semiconductor layer from the first nitride semiconductor layer to an uppermost surface is between 1 and 1.7, endpoint inclusive. 
     
     
         16 . The semiconductor device according to  claim 13 , further comprising:
 a cap layer of a p-type nitride semiconductor material between the gate electrode and the fourth nitride semiconductor layer.   
     
     
         17 . The semiconductor device according to  claim 13 , wherein the gate electrode is between the third nitride semiconductor layer and the fourth nitride semiconductor layer in a direction substantially parallel to a plane of the substrate. 
     
     
         18 . A semiconductor device, comprising:
 a first nitride semiconductor layer disposed on a substrate;   a second nitride semiconductor layer on the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;   a source electrode on the second nitride semiconductor layer;   a drain electrode on the second nitride semiconductor layer;   a gate electrode between the source electrode and the drain electrode; and   a third nitride semiconductor layer on the second nitride semiconductor layer, a lateral position of the third nitride semiconductor layer being between a lateral position of a drain-side edge of the gate electrode and a lateral position of a gate-side edge of the drain electrode, third nitride semiconductor layer being spaced from the drain electrode, wherein   the third nitride semiconductor layer comprises a halogen group element, and   an upper surface of the third nitride semiconductor layer is substantially coplanar with an uppermost surface of the second nitride semiconductor layer.   
     
     
         19 . The semiconductor device according  claim 18 , wherein a ratio t 1 /t 4  for a thickness t 1  of the second nitride semiconductor layer from the first nitride semiconductor layer to the uppermost surface and a thickness t 4  of the third nitride semiconductor layer from the first nitride semiconductor to the upper surface is between 1.5 and 10, endpoint inclusive. 
     
     
         20 . The semiconductor device according to  claim 18 , further comprising:
 a cap layer of p-type conductivity between the gate electrode and the uppermost surface of the second nitride semiconductor layer.