US2020105779A1PendingUtilityA1

Convex shaped thin-film transistor device having elongated channel over insulating layer in a groove of a semiconductor substrate

Assignee: MONTEREY RES LLCPriority: Dec 27, 2006Filed: Apr 8, 2019Published: Apr 2, 2020
Est. expiryDec 27, 2026(~0.4 yrs left)· nominal 20-yr term from priority
H01L 27/11568H01L 29/7881H01L 29/792H01L 27/115H01L 29/40117H01L 27/11563H01L 2924/0002H01L 29/7926H01L 29/66833H01L 29/40114H01L 21/84H01L 29/66825H01L 27/11556H01L 29/788H01L 27/11517H01L 27/11521H01L 23/5283H10W 20/435H10D 30/0321H10D 86/201H10D 86/01H10D 30/6893H10D 30/697H10D 30/0314H10D 64/037H10D 64/035H10D 30/693H10D 30/681H10D 30/0413H10D 30/0411H10D 30/69H10D 30/68H10B 43/00H10B 43/30H10B 41/27H10B 41/30H10B 41/00H10B 69/00
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Claims

Abstract

The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate, the substrate comprising a groove;   a plurality of first bit lines comprising a plurality of upper faces, the plurality of first bit lines provided on the substrate;   an insulating layer that is provided between the plurality of first bit lines on the substrate, the insulating layer comprising opposing side faces, wherein an upper face of the insulating layer is higher than a plurality of upper faces of the plurality of first bit lines;   wherein at least a portion of the insulating layer is provided in the groove of the substrate,   further wherein a path of a current flowing through the substrate and between the plurality of first bit lines is lengthened by the portion of the insulating layer provided in the groove of the substrate.

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