Back side dopant activation in field stop igbt

Abstract

A field stop insulated gate bipolar transistor (IGBT) fabricated without back-side laser dopant activation or any process temperatures over 450° C. after fabrication of front-side IGBT structures provides activated injection regions with controlled dopant concentrations. Injection regions may be formed on or in a substrate by epitaxial growth or ion implants and diffusion before growth of N field stop and drift layers and front-side fabrication of IGBT active cells. Back-side material removal can expose the injection region(s) for electrical connection to back-side metal. Alternatively, after front-side fabrication of IGBT active cells, back-side material removal can expose the field stop layer (or injection regions) and sputtering using a silicon target with a well-controlled doping concentration can form hole or electron injection regions with well-controlled doping concentration.

What is claimed is: 
     
         1 . A vertical Insulated Gate Bipolar Transistor (IGBT) structure comprising:
 a substrate including an injection region of a first conductivity type formed at a front side of the substrate, a back side of the substrate being thinned to expose a bottom of the injection region;   an epitaxial layer on the front side of the substrate, the epitaxial layer including:
 a field stop region of a second conductivity type; and 
 a drift region of the second conductivity type on the field stop region; 
   a plurality of IGBT active cells in and on the drift region; and   back-side metal on the back side of the substrate and contacting the injection region.   
     
     
         2 . The IGBT structure of  claim 1 , wherein the substrate has the first conductivity type. 
     
     
         3 . The IGBT structure of  claim 1 , wherein the injection region covers the back side of the substrate in an area underlying the IGBT active cells. 
     
     
         4 . The IGBT structure of  claim 1 , wherein the injection region covers a first patterned area of the back side of the substrate. 
     
     
         5 . The vertical IGBT structure of  claim 4 , wherein the injection region covers a percentage of the back side of the IGBT device between 10% and 90%, the percentage being selected to optimization of switching speed and ON-state voltage Vce. 
     
     
         6 . The IGBT structure of  claim 4 , further comprising a second patterned area of the back side of the substrate, the injection region have a first concentration of dopants of the first conductivity type and regions exposed in the second patterned area having a second concentration of dopants of the first conductivity type, the second concentration being lower than the first concentration. 
     
     
         7 . The IGBT structure of  claim 4 , wherein the IGBT structure is a reverse conducting IGBT, and further comprises a second patterned area of the back side of the substrate, wherein a second injection region in the substrate is exposed in the second patterned area, has the second conductivity type, and extends to the front side of the substrate, the back-side metal further contacting the second injection region. 
     
     
         8 . The IGBT structure of  claim 7 , wherein the second injection region the second injection region comprises an electron injection region formed below termination edges surrounding the active IGBT cells, and a circular electron injection region centered under an active device area containing the active IGBT cells. 
     
     
         9 . The vertical IGBT structure of  claim 1 , wherein the first conductivity type is P and the second conductivity type is N-type. 
     
     
         10 . The IGBT structure of  claim 1 , wherein the substrate has doping concentration greater than 1e15 cm −3  but less than 5e16 cm −3  of dopants of the first conductivity type. 
     
     
         11 . The vertical IGBT structure of  claim 1 , wherein the injection region has the doping concentration between 2e17 cm −3  and 5e19 cm −3  and thickness ranging from 2 to 12 microns. 
     
     
         12 . The vertical IGBT structure of  claim 8 , wherein the field stop region has doping concentration ranging from 5e14 cm −3  to 1e18 cm −3  and thickness ranging 1 to 10 microns. 
     
     
         13 . The IGBT structure of  claim 1 , wherein the drift region has a bathtub-like doping profile. 
     
     
         14 . The vertical IGBT structure of  claim 1 , wherein the field stop region is doped with implanted Arsenic(As) or Antimony(Sb). 
     
     
         15 . The vertical IGBT structure of  claim 1 , wherein the drift region includes a transition segment having a dopant concentration between 5e14 cm −3  and 5e15 cm −3  and thickness ranging from 2 to 5 microns. 
     
     
         16 . A method for manufacturing of a vertical Insulated Gate Bipolar Transistor (IGBT) structure, comprising:
 implanting and diffusing an impurity of a first conductivity type in a front side of a semiconductor substrate to form an injection region;   growing a field stop layer of a second conductivity type on the front side of the semiconductor substrate above the injection region;   growing a drift region of the second conductivity type of the field stop layer;   forming a plurality of IGBT active cells in and on the drift region;   removing material from a back side of the semiconductor substrate to expose a bottom of the injection region after forming the IGBT active cells; and   depositing back-side metal contacting the bottom of the injection region.   
     
     
         17 . The method of  claim 16 , wherein growing the drift region comprises:
 growing a transition segment of the drift region just above the field stop region, the transition segment having a first doping concentration lower than a doping concentration of the field stop region;   growing a high voltage segment of the drift region above the transition segment, the transition segment having a second doping concentration lower than the first doping concentration, the high voltage segment supporting high voltage blocking.   
     
     
         18 . The method of  claim 17 , further comprising growing a surface segment of the drift region having a third doping concentration that is higher than the second doping concentration. 
     
     
         19 . The method of  claim 17 , further comprising forming a region with a high doping concentration of the second conductivity type by a high energy ion implantation of phosphor extending below a body region of the active IGBT cells. 
     
     
         20 . The method of  claim 16 , wherein depositing the back-side metal comprises sputtering or vacuum evaporation of Al:Ti:Ni: Ag or Au onto the back surface of the substrate. 
     
     
         21 . The method of  claim 16 , further sintering at temperature below 450° C. after back metal deposition to improve ohmic contact of the back-side metal to the injection region. 
     
     
         22 . The method of  claim 16 , wherein the first conductivity type is P-type and the second conductivity type is N-type. 
     
     
         23 . The method of  claim 16 , wherein the injection region is a hole injection region formed by boron ion implantation with dose between 1e13 cm −2  and 5e15 cm −2  followed by diffusing at high temperature to drive in boron dopants to a depth between 2 and 12 microns in the semiconductor substrate. 
     
     
         24 . The method of  claim 16 , wherein growing the field stop layer comprises:
 growing an epitaxial layer to thickness between 2 and 10 microns, the epitaxial layer being intrinsic semiconductor or having a light doping of the second conductivity; and   ion implanting the epitaxial layer with phosphor (P), arsenic (As), or Antimony (Sb) ion at a dose between 5c11 and 5e13 cm −2 .   
     
     
         25 . A method for manufacturing of a vertical Insulated Gate Bipolar Transistor (IGBT) structure, comprising:
 growing an injection region of a first conductivity type on a front side of a semiconductor substrate;   growing a field stop layer of a second conductivity type on the injection region;   growing a drift region of the second conductivity type of the field stop layer;   forming a plurality of IGBT active cells in and on the drift region;   removing material from a back side of the semiconductor substrate to expose a bottom of the injection region after forming the IGBT active cells; and   depositing back-side metal contacting the bottom of the injection region.   
     
     
         26 . The method of  claim 25 , wherein the injection region is a hole injection region having a doping concentration between 2e17 and 1e18 cm −3  and a thickness between 2 and 15 microns in the semiconductor substrate. 
     
     
         27 . A Insulated Gate Bipolar Transistor (IGBT) structure comprising:
 an injection region of sputtered silicon having a first conductivity type;   a field stop region of a second conductivity overlying the injection region;   a drift region of the second conductivity type layer on the field stop region;   a plurality of IGBT active cells residing in and on the drift region; and   back-side metal contacting a back side of the injection region.   
     
     
         28 . The IGBT structure of  claim 27 , wherein a layer underlying the field stop region that comprises the injection region, further comprises a second region of sputtered silicon having the second conductivity type, the back-side metal contacting a back side of the second region. 
     
     
         29 . A method for manufacturing of a vertical Insulated Gate Bipolar Transistor (IGBT) including an injection region of a first conductivity type, comprising:
 epitaxially growing on a field stop layer of a second conductivity type on a substrate;   epitaxially growing a drift region of the second conductivity type on the field stop layer;   forming one or more IGBT active cells in and on the drift region;   back-side thinning of a wafer including the IGBT active cells;   sputtering an injection layer of the first conductivity type on a back-side surface of the wafer, the sputtering using a silicon target with a known and well-controlled doping concentration; and   depositing a back-side metal contacting the injection layer.   
     
     
         30 . The method of  claim 29 , wherein the back-side thinning removes the substrate. 
     
     
         31 . The method of  claim 29 , wherein the back-side thinning minimizes a thickness of the substrate under a condition that, to a tolerance of the thinning process, the field stop region remains intact. 
     
     
         32 . The method of  claim 29 , wherein the back-side thinning comprises grinding and etching. 
     
     
         33 . The method of  claim 29 , wherein depositing the back-side metal comprises:
 depositing a Al:Ti:Ni: Ag or Au composition on the injection layer; and   sintering the back-side metal at temperature below 450° C. to improve ohmic contact of the back-side metal to the injection layer.   
     
     
         34 . The method of  claim 29 , wherein growing the drift region comprises:
 growing a transition segment of the drift region just above the field stop region, the transition segment having a first dopant concentration that is lower than a doping concentration of the field stop region; and   growing a high voltage segment of the drift region above the transition segment, the high voltage segment having a second dopant concentration that is lower than the first dopant concentration and supports high voltage blocking.   
     
     
         35 . The method of  claim 29 , further comprising:
 patterning the injection layer to remove portions of the injection layer and leave a first patterned region of the first conductivity type on the back side of the wafer;   sputtering a second sputtered layer of silicon having the second conductivity type on a back side of a structure including the first patterned region, the sputtering of the second sputtered layer using a silicon target with known and well controlled doping concentration; and   removing material from the second sputtered layer to expose the first patterned region and leave a second patterned region in place of the portion of the injection layer removed.   
     
     
         36 . The method of  claim 35 , wherein patterning the injection layer comprises:
 depositing an oxide layer and a photoresist layer on a back side of the injection layer;   patterning the photoresist layer for masking;   etching exposed areas of the oxide layer and the injection layer to remove the portions of the injection layer and leave the first patterned region ; and   removing photoresist layer before sputtering the second sputtered layer.   
     
     
         37 . The method of  claim 36 , wherein removing the material from the second sputtered layer comprises at least one of etching back and chemical mechanical polishing of a back-side surface to completely remove the oxide layer and expose both the first patterned region and the second patterned region at a back side of the resulting structure. 
     
     
         38 . A method for manufacturing of a vertical Insulated Gate Bipolar Transistor (IGBT) structure, comprising:
 implanting and diffusing an impurity of a first conductivity type in a front side of a semiconductor substrate through mask to form an injection region that is patterned;   growing a field stop layer of a second conductivity type on the front side of the semiconductor substrate above the injection region;   growing a drift region of the second conductivity type of the field stop layer;   forming a plurality of IGBT active cells in and on the drift region;   removing material from a back side of the semiconductor substrate to expose a bottom of the injection region after forming the IGBT active cells; and   depositing back-side metal contacting the bottom of the injection region.   
     
     
         39 . The method of  claim 38 , wherein the injection region is patterned to include multiple islands.