Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device having favorable reliability which is capable of retaining data for a long time is provided. The semiconductor device includes a first gate electrode, a first gate insulator over the first gate electrode, a first oxide over the first gate insulator, a second oxide and a third oxide over the first oxide, a first conductor over the second oxide, a second conductor over the third oxide, a fourth oxide over the first oxide, the first conductor, and the second conductor, a second gate insulator over the fourth oxide, and a second gate electrode over the second gate insulator. The first conductor is in contact with a top surface of the second oxide, a side surface of the second oxide that faces the third oxide, and part of a top surface of the first oxide. The second conductor is in contact with a top surface of the third oxide, a side surface of the third oxide that faces the second oxide, and part of the top surface of the first oxide. The fourth oxide is in contact with part of the top surface of the first oxide between the first conductor and the second conductor.

What is claimed is: 
     
         1 . A manufacturing method of a semiconductor device, comprising:
 forming a first gate electrode and a second gate electrode;   forming a first gate insulator over the first gate electrode and the second gate electrode;   forming a first oxide over the first gate insulator;   performing heat treatment on the first oxide;   forming a second oxide over the first oxide;   performing wet etching treatment to form an opening in the second oxide such that it reaches a top surface of the first oxide and overlaps with part of the first gate electrode;   forming a first conductor over the first oxide and the second oxide;   forming a first mask over the first conductor such that the first mask includes an opening in at least part of a region overlapping with the first gate electrode and forming a second mask over the first conductor such that the second mask includes an opening in at least part of a region overlapping with the second gate electrode;   forming a first resist mask over the opening in the first mask such that the first resist mask includes a region overlapping with the first gate electrode and forming a second resist mask over the opening in the second mask such that the second resist mask includes a region overlapping with the second gate electrode;   performing etching treatment on the first conductor, the first mask, and the second mask to form a second conductor and a third mask under the first resist mask and a third conductor and a fourth mask under the second resist mask;   performing etching treatment on the first oxide and the second oxide to form a third oxide and a fourth oxide under the second conductor, a fifth oxide under the second conductor, the third oxide, and the fourth oxide, a sixth oxide under the third conductor, and a seventh oxide under the sixth oxide;   performing etching treatment on the second conductor using the third mask to form a fourth conductor and a fifth conductor and performing etching treatment on the third conductor using the fourth mask to form a sixth conductor and a seventh conductor;   forming an eighth oxide over the fifth oxide, the fourth conductor, and the fifth conductor and a ninth oxide over the sixth oxide, the sixth conductor, and the seventh conductor;   forming a second gate insulator over the eighth oxide and a third gate insulator over the ninth oxide; and   forming a third gate electrode over the second gate insulator and a fourth gate electrode over the third gate insulator.   
     
     
         2 . The manufacturing method of semiconductor device, according to  claim 1 ,
 wherein the semiconductor device comprises a first transistor and a second transistor,   wherein the first transistor comprises the first gate electrode, the first gate insulator, the third to fifth and eighth oxides, the fourth conductor, the fifth conductor, the second gate insulator and the third gate electrode,   wherein the second transistor comprises the second gate electrode, the first gate insulator, the sixth, seventh and ninth oxides, the sixth conductor, the seventh conductor, the second gate insulator and the fourth gate electrode,   wherein a channel formation region of the first transistor is in the fifth oxide, and   wherein a channel formation region of the second transistor is in the sixth oxide.   
     
     
         3 . The manufacturing method of semiconductor device, according to  claim 1 ,
 wherein the first to ninth oxides each contain a metal oxide.   
     
     
         4 . The manufacturing method of the semiconductor device, according to  claim 1 ,
 wherein the eighth oxide has a wider bandgap than the third to fifth oxides,   wherein the ninth oxide has a wider bandgap than the sixth and seventh oxides, and   wherein the fifth oxide has a wider bandgap than the sixth oxide.   
     
     
         5 . The manufacturing method of the semiconductor device, according to  claim 1 ,
 wherein the fifth and seventh oxides have a same composition,   wherein the third, fourth, and sixth oxides have a same composition, and   wherein the eighth and ninth oxides have a same composition.   
     
     
         6 . The manufacturing method of the semiconductor device, according to  claim 1 ,
 wherein the first to seventh oxides each contain In and Zn, and   wherein the eighth and ninth oxides each contain Ga.   
     
     
         7 . The manufacturing method of the semiconductor device, according to  claim 1 ,
 wherein the first to fourth masks each comprise a conductor.