Low power autonomous peripheral management

Abstract

A low power autonomous peripheral operative to receive configuration or command data and to perform the designated operation(s) without interaction of a processor.

What is claim is: 
     
         1 . A method for use in an integrated circuit comprising a processor and a peripheral, said peripheral being adapted to perform a plurality of predetermined operations, said plurality of predetermined operations each comprising a respective sequence of steps, the method comprising the steps of:
 [1.1] receiving from the processor a command indicative of a selected one of the operations;   [1.2] receiving a trigger;   [1.3] developing a control flow of the steps of the selected operation as a function of the command; and   [1.4] selectively sequencing the steps of the operation of the peripheral as a function of the control flow.   
     
     
         2 . The method of  claim 1  wherein step [1.4] is further characterized as comprising the steps of:
 [1.4.1] initiating operation of the peripheral in accordance with the control flow; 
 [1.4.2] receiving from the peripheral a response; and 
 [1.4.3] selectively sequencing the steps of the operation of the peripheral as a function of the control flow and the response. 
 
     
     
         3 . The method of  claim 2  wherein step [1.1] is further characterized as comprising the steps of:
 [1.1.1] receiving from the processor a command indicative of a selected one of the operations; and 
 [1.1.2] disabling the processor upon receipt of the command. 
 
     
     
         4 . An apparatus configured to perform the steps of a method according to  claim 1 . 
     
     
         5 . An electronic system comprising an apparatus according to  claim 4 . 
     
     
         6 . A computer readable medium including executable instructions which, when executed in a processing system, causes the processing system to perform the steps of a method according to  claim 1 . 
     
     
         7 . An integrated circuit comprising an autonomous peripheral facility, said autonomous peripheral facility comprising:
 a central processing unit (CPU) adapted to develop a first input;   a peripheral device adapted to receive a first data input, develop a first data output, and develop a first information data; and   a peripheral controller comprising a configuration register, a state machine, a control unit, and a memory, said peripheral controller being adapted to receive said first input, to exchange said first information data, and to autonomously operate said peripheral device, independent of said CPU after receiving said first input.