Self-testing measuring system

Abstract

The invention relates to a self-testing measuring system (SS) which may have at least three modes: an operating mode and at least two test modes. In a third test mode, a digital signal generating unit (DSO) stimulates the digital input circuit (DSI) directly by means of test signals, thereby allowing this signal string to be tested. In a second test mode, the digital signal generating unit (DSO) stimulates the analogue signal string (DR, AS) and the digital input circuit (DSI) by means of test signals, thereby allowing this signal string to be tested. In a first test mode, the digital signal generating unit (DSO) stimulates the analogue signal string (DR, AS), the measuring unit (TR) (typically an ultrasound transducer) and the digital input circuit (DSI) by means of test signals, thereby allowing this signal string to be tested and monitored for parameter compliance, in particular in respect of signal amplitudes. In the operating mode, the digital signal generating unit (DSO) stimulates the analogue signal string (DR, AS), the measuring unit (TR) (typically an ultrasound transducer) and the digital input circuit (DSI) by means of output signals, thereby allowing the signal string to be monitored for parameter compliance, in particular in respect of signal amplitudes.

1 . A self-testing measuring system (SS) comprising
 a digital signal generating unit (DSO),   a driver stage (DR),   a measuring unit (TR), which transmits an analogue output signal (MS) as measuring signal and receives a receive signal (ES) in response thereto,   an analogue input circuit (AS),   a digital input circuit (DSI),   an analogue channel simulation unit (ACS),   a digital channel simulation unit (DCS),   an analogue multiplexer (AMX), and   a digital multiplexer (DMX),   wherein the measuring system (SS) may assume
 in an operating phase an operating mode and 
 in a test phase, besides a first test mode, also 
 a second test mode and/or a third test mode, and 
   wherein in the operating mode
 the digital signal generating unit (DSO) generates a first digital signal (S 1 ), 
 the driver stage (DR) converts this first digital signal (S 1 ) of the digital signal generating unit (DSO) into a second analogue signal (S 2 ), 
 this second analogue signal (S 2 ) prompts the measuring unit (TR) to transmit the output signal (MS) as measurement signal into a measuring channel (CN), 
 the measuring unit (TR) receives the receive signal (ES) from the measuring channel (CN) depending on the output signal (MS), 
 the measuring unit (TR) generates a third analogue signal (S 3 ) depending on the received receive signal (ES), 
 the analogue multiplexer (AMX) forwards this third analogue signal (S 3 ) as fourth analogue signal (S 4 ), 
 the analogue input circuit (AS) converts the fourth analogue signal (S 4 ) into a fifth digital signal (S 5 ), 
 the digital multiplexer (DMX) forwards the fifth digital signal (S 5 ) as sixth digital signal (S 6 ), 
 the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates a seventh response signal (S 7 ), and 
 the seventh response signal (S 7 ) may be used as measurement result or to form the measurement result, 
   wherein in the first test mode
 the digital signal generating unit (DSO) generates a first digital signal (S 1 ), 
 the driver stage (DR) converts this first digital signal (S 1 ) of the digital signal generating unit (DSO) into a second analogue signal (S 2 ), 
 this second analogue signal (S 2 ) prompts the measuring unit (TR) to emit the output signal (MS) as measurement signal into a measuring channel (CN), 
 the measuring unit (TR) receives the receive signal (ES) from the measuring channel (CN) depending on the output signal (MS), 
 the measuring unit (TR) generates a third analogue signal (S 3 ) depending on the received receive signal (ES), 
 the analogue multiplexer (AMX) forwards this third analogue signal (S 3 ) as fourth analogue signal (S 4 ), 
 the analogue input circuit (AS) converts the fourth analogue signal (S 4 ) into a fifth digital signal (S 5 ), 
 the digital multiplexer (DMX) forwards the fifth digital signal as sixth digital signal (S 6 ), 
 the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates a seventh response signal (S 7 ), 
 the seventh response signal (S 7 ) may be used as test result or to form the result of a check performed by the measuring system, 
   wherein, in the second test mode, if provided,
 the digital signal generating unit (DSO) generates a first digital signal (S 1 ), 
 the driver stage (DR) converts this first digital signal (S 1 ) of the digital signal generating unit (DSO) into a second analogue signal (S 2 ), wherein the third analogue test signal (S 3   t ) may also be a copy of the second analogue signal (S 2 ), 
 the analogue multiplexer (AMX) forwards this third analogue test signal (S 3   t ) as fourth analogue signal (S 4 ), 
 the analogue input circuit (AS) converts the fourth analogue signal (S 4 ) into a fifth digital signal (S 5 ), 
 the digital multiplexer (DMX) forwards the fifth digital signal (S 5 ) as sixth digital signal (S 6 ), 
 the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates a seventh response signal (S 7 ), and 
 the seventh response signal (S 7 ) may be used as test result or to form the result of a check performed by the measuring system, 
   wherein, in the third test mode, if provided,
 the digital signal generating unit (DSO) generates a first digital signal (S 1 ), the digital channel simulation unit (DCS) converts this first digital signal (S 1 ) into a fifth digital test signal (S 5   t ), wherein the fifth digital test signal (S 5   t ) may also be a copy of the first digital signal (S 1 ), 
 the digital multiplexer (DMX) forwards the fifth digital test signal (S 5   t ) as sixth digital signal (S 6 ), 
 the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates a seventh response signal (S 7 ), and 
 the seventh response signal (S 7 ) may be used as test result or to form the result of a check performed by the measuring system. 
   
     
     
         2 .- 46 . (canceled)