US2020177193A1PendingUtilityA1

Voltage controlled oscillator based on complementary current-injection field-effect transistor devices

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Assignee: CIRCUIT SEED LLCPriority: Jan 24, 2015Filed: Oct 7, 2019Published: Jun 4, 2020
Est. expiryJan 24, 2035(~8.5 yrs left)· nominal 20-yr term from priority
H03K 3/354H03B 5/12H03L 7/04H03L 7/0995H03K 3/0322H03L 7/091H03L 7/0891H03L 7/24H03K 3/0315H03L 2207/10H03L 2207/06
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Claims

Abstract

A novel voltage controlled oscillator (VCO) based on complementary current-injection field-effect transistor (CiFET) devices is disclosed. The VCO includes an odd number stages of rings, each of rings comprises a CiFET.

Claims

exact text as granted — not AI-modified
1 . A voltage controlled oscillator for a phase locked loop, comprising:
 an odd number stages of two or more rings, each of said rings comprising a complementary pair (CiFET) of an n-type current-injection-injection field field-effect transistors (NiFET) and a p-type current-injection field-effect transistor (PiFET),   wherein each of said NiFET and PiFET comprises:
 a source, a drain, a gate, and a diffusion, defining a source channel between said source and said diffusion, and a drain channel between said drain and said diffusion, and said gate is capacitively coupled to said source channel and said drain channel; 
   wherein said source of said NiFET is connected to negative power supply and said source of said PiFET is connected to positive power supply, and drains of said NiFET and said PiFET are connected to form an output terminal,   said gates of said NiFET and said PiFET are connected to form an input terminal, and   said diffusion of said NiFET and said diffusion of said PiFET are connected through a transistor having a gate for receiving a voltage control signal for bypassing a current between said diffusion of said NiFET and said diffusion of said PiFET;   wherein each stage of said odd number stages comprising first and second capacitors, said first capacitor is capacitively coupling said input terminal of said CiFET of a first one of said two or more rings with said output terminal of said CiFET of a subsequent one of said two or more rings; and   said second capacitor is capacitively coupling said output terminal of said CiFET of said first one of said two or more rings with said input terminal of said CiFET of said subsequent one of said two or more rings.

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