Data relocation in hybrid memory

Abstract

The present disclosure includes apparatuses, methods, and systems for data relocation in hybrid memory. A number of embodiments include a memory, wherein the memory includes a first type of memory and a second type of memory, and a controller configured to identify a subset of data stored in the first type of memory to relocate to the second type of memory based, at least in part, on a frequency at which an address corresponding to the subset of data stored in the first type of memory has been accessed during program operations performed on the memory.

What is claimed is: 
     
         1 . An apparatus, comprising:
 a memory, wherein:
 the memory includes a first type of memory and a second type of memory; and 
 the first type of memory includes a first in, first out (FIFO) buffer; and 
   a controller configured to:
 identify, using the FIFO buffer, a subset of data stored in the first type of memory to relocate to the second type of memory based, at least in part, on a frequency at which an address corresponding to the subset of data stored in the first type of memory has been accessed during program operations performed on the memory; and 
 initiate a relocation of the identified subset of data from the first type of memory to the second type of memory. 
   
     
     
         2 . The apparatus of  claim 1 , wherein the controller is configured to identify the subset of data based on a position of the subset of data in the FIFO buffer. 
     
     
         3 . The apparatus of  claim 1 , wherein the controller is configured to identify the subset of data based on whether the subset of data is in the FIFO buffer. 
     
     
         4 . The apparatus of  claim 1 , wherein the identified subset of data is an oldest subset of data in the FIFO buffer. 
     
     
         5 . The apparatus of  claim 1 , wherein the identified subset of data is a subset of data that has been removed from the FIFO buffer. 
     
     
         6 . The apparatus of  claim 1 , wherein the address corresponding to the subset of data has been accessed least frequently during the program operations. 
     
     
         7 . A method for operating memory, comprising:
 storing, in a first type of memory, data in a table indicating a frequency at which an address corresponding to each respective one of a number of subsets of data stored in the first type of memory has been accessed during program operations performed on the memory;   identifying, using the data in the table, a subset of data among the number of subsets of data stored in the first type of memory whose corresponding address has been accessed least frequently during program operations performed on the memory; and   relocating the identified subset of data from the first type of memory to a second type of memory.   
     
     
         8 . The method of  claim 7 , wherein the method includes periodically updating the data in the table. 
     
     
         9 . The method of  claim 7 , wherein the method includes updating the data in the table upon the address corresponding to the identified subset of data being accessed during a program operation performed on the memory. 
     
     
         10 . The method of  claim 7 , wherein the method includes updating the data in the table upon a predefined number of program operations being performed on the memory. 
     
     
         11 . The method of  claim 7 , wherein the frequency is one of four possible frequencies at which the address corresponding to each respective one of the number of subsets of data stored in the first type of memory has been accessed during program operations performed on the memory. 
     
     
         12 . The method of  claim 11 , wherein:
 a first of the four possible frequencies is that the address has not been accessed during program operations performed on the memory;   a second of the four possible frequencies is that the address has been accessed once during program operations performed on the memory;   a third of the four possible frequencies is that the address has been accessed twice during program operations performed on the memory; and   a fourth of the four possible frequencies is that the address has been accessed three or more times during program operations performed on the memory.   
     
     
         13 . The method of  claim 7 , wherein the identified subset of data is a subset of data whose corresponding address has not been accessed during program operations performed on the memory. 
     
     
         14 . The method of  claim 7 , wherein relocating the identified subset of data includes:
 sensing the identified subset of data stored in the first type of memory;   programming the sensed data to the second type of memory;   updating the address corresponding to the identified subset of data to an address in the second type of memory to which the sensed data is programmed; and   invalidating the identified subset of data stored in the first type of memory.   
     
     
         15 . The method of  claim 7 , wherein the identified subset of data is a subset of data whose corresponding address has been accessed once during program operations performed on the memory. 
     
     
         16 . The method of  claim 15 , wherein relocating the identified subset of data includes:
 determining whether a backup copy of the identified subset of data is included in the second type of memory; and   relocating the identified subset of data upon determining a backup copy of the identified subset of data is not included in the second type of memory.   
     
     
         17 . An apparatus, comprising:
 a memory, wherein:
 the memory includes a first type of memory and a second type of memory; and 
 the first type of memory includes a plurality of first in, first out (FIFO) buffers; and 
   a controller configured to:
 identify, using the FIFO buffers, subsets of data stored in the first type of memory to relocate to the second type of memory based, at least in part, on a frequency at which addresses corresponding to the subsets of data stored in the first type of memory have been accessed during program operations performed on the memory; and 
 initiate a relocation of the identified subsets of data from the first type of memory to the second type of memory. 
   
     
     
         18 . The apparatus of  claim 17 , wherein the identified subsets of data are subsets of data that have been removed from one of the plurality of FIFO buffers. 
     
     
         19 . The apparatus of  claim 17 , wherein the plurality of FIFO buffers include:
 a first FIFO buffer that includes subsets of data stored in the first type of memory whose corresponding addresses have not been accessed during program operations performed on the memory;   a second FIFO buffer that includes subsets of data stored in the first type of memory whose corresponding addresses have been accessed once during program operations performed on the memory;   a third FIFO buffer that includes subsets of data stored in the first type of memory whose corresponding addresses have been accessed twice during program operations performed on the memory; and   a fourth FIFO buffer that includes subsets of data stored in the first type of memory whose corresponding addresses have been accessed three or more times during program operations performed on the memory.   
     
     
         20 . The apparatus of  claim 17 , wherein the identified subsets of data include:
 subsets of data whose corresponding addresses have not been accessed during program operations performed on the memory; and   subsets of data whose corresponding addresses have been accessed once during program operations performed on the memory.