US2020373435A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

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Assignee: SEMICONDUCTOR ENERGY LABPriority: Aug 24, 2016Filed: May 14, 2020Published: Nov 26, 2020
Est. expiryAug 24, 2036(~10.1 yrs left)· nominal 20-yr term from priority
H10D 99/00H10D 62/402H10D 62/80H10D 30/6755H10D 30/6734H10D 30/6729H10D 30/6706H10D 30/6756H01L 29/78693H01L 29/7869H01L 29/66969H01L 29/78609H01L 29/24H01L 29/78648H01L 29/41733H01L 29/247
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Claims

Abstract

A semiconductor device including a transistor having low leakage current between the drain and the gate is provided. The semiconductor device includes an insulating film provided so as to cover a corner of the first conductor and a second conductor provided so as to overlap with a corner of the first conductor with the insulating film provided therebetween. Variation in the thickness of the insulating film can be prevented by making the first conductor have a rounded corner. Furthermore, concentration of electric field due to the corner of the first conductor can be relaxed. Thus, the current leakage between the first conductor and the second conductor can be reduced.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a transistor comprising:
 a semiconductor layer; 
 a gate electrode overlapping with the semiconductor layer; 
 a gate insulating film between the semiconductor layer and the gate electrode; 
 a first conductor in contact with the semiconductor layer and functioning as one of a source electrode and a drain electrode; and 
 a second conductor in contact with the semiconductor layer and functioning as the other of the source electrode and the drain electrode, 
   wherein, in a plan view of the semiconductor device, the first conductor comprises a first side surface, a second side surface, and a curved surface between the first side surface and the second side surface,   wherein, in the plan view of the semiconductor device, the curved surface of the first conductor overlap with the gate electrode while the first side surface does not overlap with the gate electrode, and   wherein, in the plan view of the semiconductor device, a side surface of the second conductor overlaps with the gate electrode.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein, in the plan view of the semiconductor device, the second conductor does not include a curved surface in a region where the second conductor and the semiconductor layer overlap each other. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein the semiconductor layer is an oxide semiconductor layer comprising a c-axis aligned crystal. 
     
     
         5 . The semiconductor device according to  claim 2 , wherein the semiconductor layer is an oxide semiconductor layer comprising indium, gallium, and zinc. 
     
     
         6 . The semiconductor device according to  claim 2 , wherein the gate electrode, the first conductor, and the second conductor comprise aluminum.

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