Random access memory (ram)-based computer systems, devices, and methods

Abstract

In some embodiments, systems, methods, and devices disclosed herein are directed to RAM-based computer systems, methods, and devices that offer improved performance over conventional computer systems. In some embodiments, the RAM-based computer systems, devices, and methods described herein can function without reliance on conventional storage devices and thus are not subject to the bottleneck in processing speed associated with conventional storage devices. Rather, in some embodiments, the RAM-based computer systems, devices, and methods described herein include and/or utilize a processor and RAM, wherein the RAM is used for mass data storage, without reliance on a conventional hard drive, solid state drive, or any other peripheral storage device.

1 .- 20 . (canceled) 
     
     
         21 . A computer-implemented method for writing data onto a random access memory of a computer system, the method comprising:
 intercepting, by the computer system, a request to write data onto a storage device from a host operating on the computer system;   receiving, by the computer system, the data of the request to write data onto the storage device from the host operating on the computer system;   dividing, by the computer system, the data into a plurality of blocks;   generating, by the computer system, a plurality of bit markers corresponding to the plurality of blocks, wherein each of the plurality of bit markers are smaller in data size compared to each of the corresponding plurality of blocks;   determining, by the computer system, whether a bit marker of the plurality of bit markers is pre-stored on a random access memory storage of the computer system;   updating, by the computer system, metadata of the bit marker if the bit marker is determined to be pre-stored on the random access memory storage;   storing, by the computer system, the bit marker and a corresponding block in the random access memory storage if the bit marker is determined not to be pre-stored on the random access memory storage; and   generating, by the computer system, a pointer comprising location data of where the corresponding block is stored in the random access memory storage,   wherein the computer system comprises the processor, the random access memory storage, and the storage device,   wherein the storage device comprises a hard disk drive or a solid state drive, and   wherein the storage device is used by the computer system only to store back-up data of data stored in the random access memory storage.   
     
     
         22 . The computer-implemented method of  claim 21 , wherein the host comprises a virtual machine operating on the computer system. 
     
     
         23 . The computer-implemented method of  claim 21 , wherein the computer system is configured to intercept the request to write data onto the storage device from the host without knowledge of an operating system of the host. 
     
     
         24 . The computer-implemented method of  claim 21 , wherein the bit marker and the block are stored in a capacity efficient shared storage pool (CESSP) of the random access memory storage, wherein the CESSP comprises all unique blocks of divided data stored on the random access memory storage. 
     
     
         25 . The computer-implemented method of  claim 21 , wherein the bit marker and the block of divided raw data are stored in a table of the random access memory storage, wherein the table comprises mapping data of all bit markers and all corresponding unique blocks of divided data stored on the random access memory storage. 
     
     
         26 . The computer-implemented method of  claim 21 , wherein the pointer comprising location data of where the block of divided data is stored in a logical extended memory (LEM) of the random access memory storage, wherein the LEM comprises a plurality of pointers representing a storage location of all unique blocks of divided data stored on the random access memory storage. 
     
     
         27 . A computing system comprising:
 a processor;   a random access memory storage;   a storage device, wherein the storage device is a hard disk drive or a solid state drive;   the processor electrically connected to the random access memory storage and the storage device;   the processor configured to primarily store data in the random access memory storage using a plurality of bit markers stored in the random access memory storage;   the processor configured to process data by only reading and writing data from and to the random access memory storage;   the processor configured to only copy data from the random access memory storage to store as a backup in the storage device,   the plurality of bit markers configured to enable storage of more data in the random access memory storage than storage of data in the random access memory storage without the use of the plurality of bit markers.   
     
     
         28 . The computing system of  claim 27 , wherein the random access memory storage is further configured to store a plurality of unique blocks of data corresponding to the plurality of bit markers stored in the random access memory storage. 
     
     
         29 . The computing system of  claim 28 , wherein the random access memory storage comprises a capacity efficient shared storage pool (CESSP) for storing the plurality of unique blocks of data corresponding to the plurality of bit markers stored in the random access memory storage. 
     
     
         30 . The computing system of  claim 28 , wherein the random access memory storage comprises a table comprising mapping data of the plurality of unique blocks of data to the corresponding plurality of bit markers stored in the random access memory storage. 
     
     
         31 . The computing system of  claim 28 , wherein the random access memory storage comprises a logical extended memory (LEM) comprising the plurality of bit markers and a plurality of pointers, wherein the plurality of pointers comprise location data of the plurality of unique blocks of data stored in the random access memory storage. 
     
     
         32 . The computing system of  claim 27 , further comprising a data management module, wherein the data management module is configured to intercept and process read and write requests from the processor. 
     
     
         33 . The computing system of  claim 32 , wherein the data management module is configured to divide data of a write request into a plurality of blocks of data and determine whether each of the plurality of blocks of data are pre-stored in the random access memory storage. 
     
     
         34 . The computing system of  claim 33 , wherein the data management module is further configured to store in the random access memory a block of data that was determined not to be pre-stored in the random access memory and assign a bit marker corresponding to the block of data. 
     
     
         35 . The computing system of  claim 33 , wherein the data management module is further configured to retrieve a bit marker from the random access memory corresponding to a block of raw data that was determined to be pre-stored in the random access memory, wherein the bit marker corresponds to the block of data. 
     
     
         36 . The computing system of  claim 32 , wherein the data management module is configured to intercept and process read and write requests without knowledge of an operating system operating on the computing system. 
     
     
         37 . The computing system of  claim 32 , wherein the data management module is part of an operating system operating on the computing system. 
     
     
         38 . The computing system of  claim 32 , wherein the data management module is separate from an operating system operating on the computing system. 
     
     
         39 . The computing system of  claim 27 , further comprising a power supply and a backup power supply. 
     
     
         40 . The computing system of  claim 27 , wherein the random access memory comprises dynamic random access memory (DRAM).