Systems and methods for implementing a random access augmented machine perception and dense algorithm integrated circuit

Abstract

A system and method for random access augmented flow-based processing within an integrated circuit includes computing, by a plurality of distinct processing cores, a plurality of linear indices and associated valid bits; propagating the plurality of linear indices in a predetermined manner to a plurality of columns of first-in, first-out buffers; loading, from the FIFO buffers, the plurality of linear indices to a content addressable memory; at the CAM: coalescing redundant linear indices in each of the plurality of FIFO buffers; performing lookups for a plurality of memory addresses based on the plurality of linear indices; collecting at a read data buffer a plurality of distinct pieces of data from one of an on-chip memory based on the plurality of memory addresses; reading the plurality of distinct pieces of data from the read data buffer; and propagating the plurality of distinct pieces of data into the processing cores.

What is claimed is: 
     
         1 . A method for random access augmented flow-based processing within an integrated circuit, the method comprising:
 computing, by a plurality of distinct processing cores of an integrated circuit, a plurality of linear indices and associated valid bits;   propagating the plurality of linear indices in a predetermined manner to a plurality of data buffers;   loading, from the plurality of data buffers, the plurality of linear indices to an associative memory;   at the associative memory:
 (i) coalescing redundant linear indices in each of the plurality of data buffers; 
 (ii) performing lookups for a plurality of memory addresses based on the plurality of linear indices; 
   collecting at a read data buffer a plurality of distinct pieces of data from integrated circuit memory based on the plurality of memory addresses;   reading, by the plurality of data buffers, the plurality of distinct pieces of data from the read data buffer; and   propagating the plurality of distinct pieces of data into the plurality of distinct processing cores.