US2021120667A1PendingUtilityA1

Textured test pads for printed circuit board testing

Assignee: SEAGATE TECHNOLOGY LLCPriority: May 28, 2019Filed: Dec 7, 2020Published: Apr 22, 2021
Est. expiryMay 28, 2039(~12.8 yrs left)· nominal 20-yr term from priority
H05K 2203/162G01R 31/2808H05K 3/4007H05K 1/0268H05K 3/244H05K 3/282H05K 2201/0373G01R 31/2818H05K 1/111H05K 2203/0369
62
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Claims

Abstract

A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of thee printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.

Claims

exact text as granted — not AI-modified
1 .- 7 . (canceled) 
     
     
         8 . A method of making a printed circuit board comprising the steps of:
 forming an electrical circuit with a least a portion of the circuit provided along a portion of a surface layer, the electrical circuit including at least an electrical trace that is also electrically connected with a test pad to allow the electrical circuit to be probe tested;   structuring a probe surface of the test pad to include at least one surface that extends from the probe surface toward the substrate by partially removing test pad material from within a thickness of the test pad and thus creating an edge between the surface and the probe surface; and   coating at least a portion of the probe surface including the edge with a protective material to protect at least a portion of the probe surface from corrosion.   
     
     
         9 . The method of  claim 8 , wherein the surface is created by partially removing test pad material without removing test pad material entirely through the test pad thickness. 
     
     
         10 . The method of  claim 8 , further comprising structuring the probe surface with a plurality of structures, each having a surface extending from the probe surface toward the substrate created by partially removing test pad material from with the thickness of the test pad. 
     
     
         11 . The method of  claim 10 , wherein the structuring step comprises creating a predetermined pattern of dimples within the thickness of the test pad thus also creating edges at each dimple and the probe surface. 
     
     
         12 . The method of  claim 11 , wherein the structuring step is performed by an etching process. 
     
     
         13 . The method of  claim 11 , wherein the structuring step also comprises patterning the dimples as a honeycomb pattern on a circular test pad. 
     
     
         14 . The method of  claim 8 , further comprising forming plural electrical circuits of the printed circuit board, wherein test pads are arranged over the surface layer of the printed circuit board for test probing and structuring each test pad and coating each test pad with material to protect the conductive probe surface from corrosion. 
     
     
         15 . A method of probing an electrical circuit as provided at least partially on a surface layer of a printed circuit board comprising the steps of:
 locating a test pad of the circuit as such test pad is provided for accessibility on the printed circuit board;   relatively moving a probe of an in circuit test unit toward a conductive probe surface of the test pad, the probe surface structured to provide at least one surface that extends from the probe surface toward the surface layer and that creates an edge between the vertical surface and the conductive probe surface; and   displacing an amount of protective material covering the conductive probe surface by action of the probe contacting the protective material so as to permit conductive contact of the probe with the conductive probe surface.   
     
     
         16 . The printed circuit board of  claim 15 , wherein the displacement of an amount of protective material is controlled to occur at or adjacent to the edge of the structured probe surface. 
     
     
         17 . The printed circuit board of  claim 15 , wherein the electrical circuit is tested by contacting two test pads of the electrical circuit that are each electrically connected with the electrical circuit by two probes, and the testing comprises checking the electrical circuit for continuity. 
     
     
         18 . The printed circuit board of  claim 15 , wherein the method further comprises testing plural electrical circuits as are provided within the construction of the printed circuit board by contacting an arrangement of probes with a similar arrangement of test pads provided on the surface layer. 
     
     
         19 . The method of  claim 15 , wherein the displacing of protective material is conducted by a movement of the probe after contact with the protective material to remove the protective material from a portion of the conductive probe surface. 
     
     
         20 . The method of  claim 19 , wherein the protective material is removed at the edge of the structured surface. 
     
     
         21 . The method of  claim 8 , wherein the coating step comprises coating the entire probe surface including one or more edges with a\the protective material to cover and protect the probe surface from corrosion. 
     
     
         22 . The method of  claim 8 , wherein the protective material comprises a material that is at least partially dielectric. 
     
     
         23 . The method of  claim 15 , wherein the protective material comprises a material that is at least partially dielectric and the displacing step comprises creating an conductive path between the probe and the test pad by displacing the dielectric material.

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