US2021125888A1PendingUtilityA1

Electronic device and manufacturing method thereof

Assignee: INNOLUX CORPPriority: Oct 25, 2019Filed: Oct 19, 2020Published: Apr 29, 2021
Est. expiryOct 25, 2039(~13.2 yrs left)· nominal 20-yr term from priority
H10W 74/134H10W 74/01H10D 86/451H10D 86/60H10D 86/411H01L 21/56H01L 23/3178
47
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Claims

Abstract

An electronic device is provided. The electronic device includes a substrate, an active element, a first insulation layer, and a detection element. The active element is disposed on the substrate. The first insulation layer is disposed on the active element. The detection element is disposed on the first insulation layer. The detection element comprises a lower electrode, an active layer and an upper electrode, and the lower electrode is a part of a conductive layer. The first insulation layer has a recess, and the recess does not overlap with the conductive layer in the normal direction of the substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An electronic device, comprising:
 a substrate;   an active element, disposed on the substrate;   a first insulation layer, disposed on the active element; and   a detection element, disposed on the first insulation layer, wherein the detection element comprises a lower electrode, an active layer and an upper electrode, the lower electrode is a part of a conductive layer;   wherein the first insulation layer has a recess, and the recess does not overlap with the conductive layer in a normal direction of the substrate.   
     
     
         2 . The electronic device according to  claim 1 , wherein the first insulation layer has a first thickness, the recess has a depth, and the depth is greater than or equal to 0.01 μm and less than or equal to the first thickness. 
     
     
         3 . The electronic device according to  claim 1 , wherein in the normal direction of the substrate, a first portion of the first insulation layer overlaps with the conductive layer and has a first thickness, a second portion of the first insulation layer does not overlap with the conductive layer and has a second thickness, and the second thickness is less than the first thickness. 
     
     
         4 . The electronic device according to  claim 3 , wherein a depth of the recess is a maximum distance between a top surface of the first portion and a top surface of the second portion in the normal direction of the substrate. 
     
     
         5 . The electronic device according to  claim 3 , wherein an angle between a first side wall surface of the recess and a top surface of the first portion is greater than 90 degrees. 
     
     
         6 . The electronic device according to  claim 1 , further comprising:
 a flat layer, disposed between the active element and the first insulation layer.   
     
     
         7 . The electronic device according to  claim 1 , wherein at least a portion of a first side wall surface of the recess is aligned with at least a portion of a second side wall surface of the conductive layer. 
     
     
         8 . The electronic device according to  claim 7 , wherein an included angle between an extension surface of the first side wall surface and a top surface of the substrate is equal to an included angle between an extension surface of the second side wall surface and the top surface of the substrate. 
     
     
         9 . The electronic device according to  claim 1 , wherein at least a portion of a first side wall surface of the recess is not aligned with at least a portion of a second side wall surface of the conductive layer. 
     
     
         10 . The electronic device according to  claim 1 , wherein the active layer is located between the lower electrode and the upper electrode. 
     
     
         11 . The electronic device according to  claim 10 , further comprising:
 a second insulation layer, disposed between the active layer and the lower electrode, wherein the second insulation layer has another recess, and in the normal direction of the substrate, the another recess does not overlap with the active layer.   
     
     
         12 . The electronic device according to  claim 11 , wherein in the normal direction of the substrate, a third portion of the second insulation layer overlaps with the active layer and has a third thickness, a fourth portion of the second insulation layer does not overlap with the active layer and has a fourth thickness, and the fourth thickness is less than the third thickness. 
     
     
         13 . The electronic device according to  claim 11 , wherein the second insulation layer has an opening, and the active layer is electrically connected to the lower electrode via the opening. 
     
     
         14 . The electronic device according to  claim 11 , wherein in the normal direction of the substrate, the another recess overlaps with a portion of the lower electrode. 
     
     
         15 . The electronic device according to  claim 1 , wherein in the normal direction of the substrate, the recess of the first insulation layer overlaps with at least a portion of a channel area of the active element. 
     
     
         16 . The electronic device according to  claim 1 , wherein in the normal direction of the substrate, the conductive layer overlaps with at least a portion of a channel area of the active element. 
     
     
         17 . A method of manufacturing an electronic device, comprising:
 forming an active element on a substrate;   forming a first insulation layer on the active element;   forming a conductive layer on the first insulation layer;   performing an etching process on a region of the first insulation layer which is not overlapping with the conductive layer to form a recess; and   forming an active layer on the conductive layer.   
     
     
         18 . The method according to  claim 17 , further comprising
 forming a second insulation layer on the conductive layer before forming the active layer.   
     
     
         19 . The method according to  claim 18 , further comprising:
 performing another etching process on a region of the second insulation layer which is not overlapping with the active layer to form another recess.   
     
     
         20 . The method according to  claim 17 , further comprising:
 forming a flat layer on the active element.

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