Methods and apparatus to improve computing resource utilization

Abstract

Methods, apparatus, systems and articles of manufacture are disclosed to improve computing resource utilization. An example apparatus includes an application specific sensor (AS) to monitor a workload of a platform, the workload executing on at least one general purpose central processing unit (CPU) of the platform, and a dynamic deployment module (DDM) to: in response to a workload performance threshold being satisfied, identify a bit stream capable of configuring a field programmable gate array (FPGA) to execute the workload, and configure the FPGA via the bit stream to execute at least a portion of the workload.

1 .- 32 . (canceled) 
     
     
         33 . An apparatus, comprising:
 memory; and   at least one processor to execute machine readable instructions to cause the at least one processor to at least:
 cause monitoring of a threshold performance value of a workload; 
 in response to the threshold performance value being satisfied, cause transmission of a query to a data source of physically reprogrammable bit streams for a physically reprogrammable bit stream that matches the workload based on an identifier of the workload, the physically reprogrammable bit streams corresponding to respective subscription objects; 
 in response to identifying a subscription object corresponding to a matching one of the physically reprogrammable bitstreams in the data source, cause a transmission of a request to obtain the matching one of the physically reprogrammable bit streams, the request including the identifier of the workload to verify the workload is authorized to use the matching one of the physically reprogrammable bit streams; and 
 in response to obtaining the matching one of the physically reprogrammable bit streams, configure a reprogrammable hardware device via the matching one of the physically reprogrammable bit streams to execute at least one function of the workload. 
   
     
     
         34 . The apparatus as defined in  claim 33 , wherein the at least one processor is to configure the reprogrammable hardware device to optimize a performance metric of the workload. 
     
     
         35 . The apparatus as defined in  claim 34 , wherein the optimized performance metric is a latency of the workload, the latency reduced when the at least one function of the workload is executed by the reprogrammable hardware device and the at least one function of the workload is not executed by the at least one processor. 
     
     
         36 . The apparatus as defined in  claim 33 , wherein the threshold performance value includes at least one of a percent threshold value of a general purpose central processing unit (CPU) utilization, a percent threshold value of memory utilization, or a bandwidth threshold value of traffic. 
     
     
         37 . The apparatus as defined in  claim 33 , wherein the at least one processor is to, in response to the threshold performance value being satisfied:
 identify parameters associated with the physically reprogrammable bit streams, wherein the identified parameters define the workload;   identify if one of the physically reprogrammable bit streams in a second memory matches the workload; and   in response to none of the physically reprogrammable bit streams in the memory matching the workload, cause transmission of the query to the data source of physically reprogrammable bit streams for the physically reprogrammable bit stream that matches the workload.   
     
     
         38 . The apparatus as defined in  claim 37 , wherein the at least one processor is to, in response to one of the physically reprogrammable bit streams in the second memory matching the workload, configure the reprogrammable hardware device via the matching one of the physically reprogrammable bit streams in the second memory, the configuration to cause the reprogrammable hardware device to execute the at least one function of the workload. 
     
     
         39 . The apparatus as defined in  claim 33 , wherein the at least one processor is to:
 store the matching one of the physically reprogrammable bit streams from the data source in a second memory after configuring the reprogrammable hardware device via the matching one of the physically reprogrammable bit streams; and   obtain the matching one of the physically reprogrammable bit streams from the data source from the second memory in response to a second instance that the threshold performance value is satisfied.   
     
     
         40 . The apparatus as defined in  claim 33 , wherein the at least one processor is to discontinue executing the workload in response to the reprogrammable hardware device executing the workload. 
     
     
         41 . The apparatus as defined in  claim 33 , wherein the at least one processor is located on at least one of a cloud-based computing resource or a stand-alone computing device. 
     
     
         42 . The apparatus as defined in  claim 33 , wherein the reprogrammable hardware device includes a field-programmable gate array (FPGA). 
     
     
         43 . The apparatus as defined in  claim 33 , the apparatus further including communication circuitry to:
 cause the transmission of the query to the data source of physically reprogrammable bit streams; and   cause the transmission of the request to obtain the matching one of the physically reprogrammable bit streams.   
     
     
         44 . A system comprising:
 a memory; and   a dynamic deployment circuit to:
 cause monitoring of a threshold performance value of a workload of at least one processor; 
 in response to the threshold performance value being satisfied, cause transmission of a query to a data source of physically reprogrammable bit streams for a physically reprogrammable bit stream that matches the workload based on an identifier of the workload, the physically reprogrammable bit streams corresponding to respective subscription objects; and 
 in response to obtaining the matching one of the physically reprogrammable bit streams, configure a reprogrammable hardware device via the matching one of the physically reprogrammable bit streams to execute at least one function of the workload. 
   
     
     
         45 . The system as defined in  claim 44 , wherein the dynamic deployment circuit is to configure the reprogrammable hardware device to optimize a performance metric of the workload. 
     
     
         46 . The system as defined in  claim 45 , wherein the optimized performance metric is a latency of the workload, the latency reduced when the at least one function of the workload is executed by the reprogrammable hardware device and the at least one function of the workload is not executed by the at least one processor. 
     
     
         47 . The system as defined in  claim 44 , wherein the dynamic deployment circuit is to, in response to the threshold performance value being satisfied:
 identify parameters associated with the physically reprogrammable bit streams, wherein the identified parameters define the workload;   identify if one of the physically reprogrammable bit streams in a memory matches the workload; and   in response to none of the physically reprogrammable bit streams in the memory matches to the workload, cause transmission of the query to the data source of physically reprogrammable bit streams for the physically reprogrammable bit stream that matches the workload.   
     
     
         48 . The system as defined in  claim 47 , wherein the dynamic deployment circuit is to, in response to one of the physically reprogrammable bit streams in the memory matching to the workload, configure the reprogrammable hardware device via the matching one of the physically reprogrammable bit streams in the memory, the configuration to cause the reprogrammable hardware device to execute the at least one function of the workload. 
     
     
         49 . The system as defined in  claim 44 , wherein the query includes the identifier of the workload to verify the workload is authorized to use the matching one of the physically reprogrammable bit streams. 
     
     
         50 . The system as defined in  claim 44 , wherein the dynamic deployment circuit is to:
 store the matching one of the physically reprogrammable bit streams from the data source in a memory after configuring the reprogrammable hardware device via the matching one of the physically reprogrammable bit streams; and   obtain the matching one of the physically reprogrammable bit streams from the data source from the memory in response to a second instance that the threshold performance value is satisfied.   
     
     
         51 . The system as defined in  claim 44 , wherein the dynamic deployment circuit is to discontinue executing the workload in response to the reprogrammable hardware device executing the workload. 
     
     
         52 . The system as defined in  claim 44 , wherein the dynamic deployment circuit is to obtain the matching one of the physically reprogrammable bit streams for stand-alone computing devices associated with an Enterprise information technology network. 
     
     
         53 . The system as defined in  claim 44 , wherein the reprogrammable hardware device includes a field-programmable gate array (FPGA). 
     
     
         54 . A tangible computer-readable storage disk or storage device comprising instructions which, when executed, cause a processor to at least:
 cause monitoring of a threshold performance value of a workload of at least one processor;   in response to the threshold performance value being satisfied, cause transmission of a query to a data source of physically reprogrammable bit streams for a physically reprogrammable bit stream that matches the workload based on an identifier of the workload, the physically reprogrammable bit streams corresponding to respective subscription objects;   in response to identifying a subscription object corresponding to a matching one of the physically reprogrammable bitstreams in the data source, cause transmission of a request to obtain the matching one of the physically reprogrammable bit streams, the request including the identifier of the workload to verify the workload is authorized to use the matching one of the physically reprogrammable bit streams; and   in response to obtaining the matching one of the physically reprogrammable bit streams, configure a reprogrammable hardware device via the matching one of the physically reprogrammable bit streams to execute at least one function of the workload.   
     
     
         55 . The tangible computer-readable storage disk or storage device as defined in  claim 54 , wherein the instructions, when executed, further cause the processor to configure the reprogrammable hardware device to optimize a performance metric of the workload. 
     
     
         56 . The tangible computer-readable storage disk or storage device as defined in  claim 55 , wherein the optimized performance metric is a latency of the workload, the latency reduced when the at least one function of the workload is executed by the reprogrammable hardware device and the at least one function of the workload is not executed by the at least one processor. 
     
     
         57 . The tangible computer-readable storage disk or storage device as defined in  claim 55 , wherein the instructions, when executed, further cause the processor to, in response to the threshold performance value being satisfied:
 identify parameters associated with the physically reprogrammable bit streams, wherein the identified parameters define the workload;   identify if one of the physically reprogrammable bit streams in a memory matches to the workload; and   in response to none of the physically reprogrammable bit streams in the memory matches the workload, cause transmission of the query to the data source of physically reprogrammable bit streams for the physically reprogrammable bit stream that matches the workload.   
     
     
         58 . The tangible computer-readable storage disk or storage device as defined in  claim 57 , wherein the instructions, when executed, further cause the processor to, in response to one of the physically reprogrammable bit streams in the memory matching to the workload, configure the reprogrammable hardware device via the matching one of the physically reprogrammable bit streams in the memory, the configuration to cause the reprogrammable hardware device to execute the at least one function of the workload. 
     
     
         59 . The tangible computer-readable storage disk or storage device as defined in  claim 54 , wherein the instructions, when executed, further cause the processor to:
 store the matching one of the physically reprogrammable bit streams from the data source in a memory after configuring the reprogrammable hardware device via the matching one of the physically reprogrammable bit streams; and   obtain the matching one of the physically reprogrammable bit streams from the data source from the memory in response to a second instance that the threshold performance value is satisfied.   
     
     
         60 . The tangible computer-readable storage disk or storage device as defined in  claim 54 , wherein the instructions, when executed, further cause the processor to discontinue executing the workload in response to the reprogrammable hardware device executing the workload. 
     
     
         61 . The tangible computer-readable storage disk or storage device as defined in  claim 54 , wherein the reprogrammable hardware device includes a field-programmable gate array (FPGA).