Mechanical Computing Systems

Abstract

Systems and methods are disclosed for creating mechanical computing mechanisms and Turing-complete systems which include combinatorial logic and sequential logic, and which are energy-efficient.

1 . A computing system comprising:
 at least one clock providing at least one mechanical clock signal;   an anchor block;   an arithmetic/logic unit operated by said at least one clock, said arithmetic/logic unit receiving data inputs and having a plurality of combinatorial logic mechanisms that operate on said data inputs to provide outputs,
 wherein, for at least a subset of said plurality of combinatorial logic mechanisms, each of said combinatorial logic mechanisms requires only the use of primitives selected from the group consisting of rigid links, pulleys, cables, and knobs, selected ones of which are movably connected to said anchor block by joints selected from the group consisting of pivot joints and flexures, to operate on at least one data input to provide at least one output; 
   a memory unit operated by said at least one clock and having a plurality of mechanical memory cells,
 said memory unit being connected to said arithmetic/logic unit so as to store selected outputs therefrom as memory states and to provide selected memory states as inputs to said arithmetic/logic unit, 
 wherein, for at least a subset of said plurality of mechanical memory cells, each of said mechanical memory cells requires only the use of primitives selected from the group consisting of rigid links, pulleys, cables, and knobs, selected ones of which are movably connected to said anchor block by joints selected from the group consisting of pivot joints and flexures, to store and provide outputs. 
   
     
     
         2 . The computing system of  claim 1  wherein, for at least a subset of mechanical memory cells in said plurality, the connections between primitives in such mechanical memory cells remain unbroken as said mechanical memory cells operate. 
     
     
         3 . The computing system of  claim 1  wherein, for at least a subset of combinatorial logic mechanisms in said plurality, the connections between primitives in each of such combinatorial logic mechanisms remain unbroken as said combinatorial logic mechanisms operate. 
     
     
         4 . The computing system of  claim 1  wherein, for at least a subset of combinatorial logic mechanisms and mechanical memory cells in said pluralities, any non-trivial storage and release of potential energy that is required to operate such combinatorial logic mechanisms and mechanical memory cells occurs at a speed proportional to one of said mechanical clock signals. 
     
     
         5 . The computing system of  claim 1  wherein, for at least a subset of combinatorial logic mechanisms and mechanical memory cells in said pluralities, storage or release of non-trivial amounts of potential energy is not required to position said outputs. 
     
     
         6 . The computing system of  claim 1  wherein at least a subset of said combinatorial logic mechanisms are configured to store their input states. 
     
     
         7 . The computing system of  claim 1  wherein at least a subset of said combinatorial logic mechanisms and said mechanical memory cells are configured such that operation does not require transmitting force to any part that is not free to move in response to such force. 
     
     
         8 . A computing system comprising:
 at least one clock providing at least one mechanical clock signal;   an anchor block;   an arithmetic/logic unit operated by said at least one clock, said arithmetic/logic unit receiving data inputs and having a plurality of combinatorial logic mechanisms that operate on said data inputs to provide outputs,
 wherein, for at least a subset of combinatorial logic mechanisms in said plurality, the connections between elements in each of such combinatorial logic mechanisms remain unbroken as said combinatorial logic mechanism operates; 
   a memory unit operated by said at least one clock and having a plurality of mechanical memory cells,
 said memory unit being connected to said arithmetic/logic unit so as to store selected outputs therefrom as memory states and to provide selected memory states as inputs to said arithmetic/logic unit, and 
 wherein, for at least a subset of said mechanical memory cells in said plurality, the connections between elements in each of such mechanical memory cells remain unbroken as said mechanical memory cell operates. 
   
     
     
         9 . The computing system of  claim 8  wherein those combinatorial logic mechanisms and mechanical memory cells in which the connections between elements remain unbroken during operation are each operated by one of said mechanical clock signals, and any non-trivial storage and release of potential energy that is required to operate such combinatorial logic mechanisms and mechanical memory cells occurs at a speed proportional to one of said mechanical clock signals. 
     
     
         10 . The computing system of  claim 8  wherein, for at least a subset of combinatorial logic mechanisms and mechanical memory cells in said pluralities, storage or release of non-trivial amounts of potential energy is not required to position said outputs. 
     
     
         11 . The computing system of  claim 8  wherein at least a subset of said combinatorial logic mechanisms are configured to store their input states. 
     
     
         12 . The computing system of  claim 8  wherein at least a subset of said combinatorial logic mechanisms and said mechanical memory cells are configured such that operation does not require transmitting force to any part that is not free to move responsive to such force. 
     
     
         13 . A computing mechanism comprising:
 an anchor block; and   a plurality of logic structures mounted to said anchor block, each of said logic structures being configured to require only the use of primitives selected from the group consisting of rigid links, pulleys, cables, knobs, rotary joints, and flexure joints operate on at least one data input to position at least one output, such output position(s) being determined by a logic operation performed on at least one data input, where the logic operation includes at least one of a combinatorial logic function or a sequential logic function,
 wherein said logic structures are connected together such that the positions of outputs from one subset of logic structures serve to define the positions of inputs of another subset of logic structures. 
   
     
     
         14 . The computing mechanism of  claim 13  wherein each of said logic structures further comprises:
 one or more input primitives that provide said data inputs and one or more output primitives that provide said outputs, wherein discrete positions of said input primitives and said output primitives represent integer values; and 
 internal connecting primitives arranged to operably connect said input primitives to said output primitive(s) such that the position(s) of at least a subset of said output primitives are defined by a logic operation performed on at least a subset of said input primitives. 
 
     
     
         15 . The computing mechanism of  claim 13  wherein, for at least a subset of logic structures in said plurality, the connections between primitives in such logic structures remain unbroken as said logic structures operate. 
     
     
         16 . The computing mechanism of  claim 13  wherein, for at least a subset of logic structures in said plurality, storage or release of non-trivial amounts of potential energy is not required to position said output(s). 
     
     
         17 . The computing mechanism of  claim 13  wherein at least a subset of said logic structures are configured to store their input states. 
     
     
         18 . The computing mechanism of  claim 13  wherein at least a subset of said logic structures are configured such that operation does not require transmitting force to any part that is not free to move responsive to such force. 
     
     
         19 . A logic mechanism comprising:
 an anchor block; and   an assembly configured to perform a defined combinatorial logic operation and/or a defined sequential logic operation, said assembly requiring only any combination of mechanical link logic primitives, mechanical flexure logic primitives, and mechanical cable logic primitives;   wherein,
 one or more of said primitives define one or more inputs of data, encoded by the physical position of said inputs, 
 one or more of said primitives define one or more outputs of data, encoded by the physical position of said outputs, and 
 said primitives are connected with each other to selectively allow or prevent movement of other primitives with respect to said anchor block based on the physical position of said one or more inputs, so that said one or more outputs occupy positions defined by the result of the defined logic operation on said one or more inputs. 
   
     
     
         20 . The logic mechanism of  claim 19  wherein the selectively allowed or prevented movement of primitives determines the positions into which said one or more outputs are placed upon displacement of one or more of said primitives by a mechanical clock signal. 
     
     
         21 . The logic mechanism of  claim 19  wherein the connections between said primitives required to perform the defined logic operation remain unbroken as the logic mechanism operates. 
     
     
         22 . The logic mechanism of  claim 19  wherein storage or release of non-trivial amounts of potential energy is not required to position said output(s). 
     
     
         23 . The logic mechanism of  claim 19  wherein operation does not require transmitting force to any primitive that is not free to move responsive to such force.