Semiconductor device and method for manufacturing the same

Abstract

A semiconductor device includes a semiconductor body, first and second electrodes and a control electrode. The semiconductor body is positioned between the first and second electrodes. The control electrode is provided between the semiconductor body and the first electrode. The semiconductor body includes a first layer of a first conductivity-type and a second layer of a second conductivity-type alternately arranged along the first electrode. The first and second layers include first and second low-concentration portions, respectively. The first low-concentration portion has a first conductivity-type impurity concentration lower than that in other portion of the first layer. The second low-concentration portion has a second conductivity-type impurity concentration lower than that in other portion of the second layer. The first low-concentration portion is positioned at a level same as a level of the second low-concentration portion in a direction directed toward the first electrode from the second electrode.

What is claimed is: 
     
         1 . A method for manufacturing a semiconductor device, the method comprising:
 selectively ion-implanting a first conductive type impurity into a first region of a first semiconductor layer, the first conductive type impurity having a first amount in the first region of the first semiconductor layer;   selectively ion-implanting a second conductive type impurity into a second region of the first semiconductor layer, the second conductive type impurity having the same amount in the second region of the first semiconductor layer as the first amount of the first conductive type impurity in the first region of the first semiconductor layer, the second region being adjacent in a first direction along a top surface of the first semiconductor layer;   forming a second semiconductor layer on the top surface of the first semiconductor layer;   selectively ion-implanting a first conductive type impurity into a first region of the second semiconductor layer, the first region of the second semiconductor layer being positioned above the first region of the first semiconductor layer, the first conductive type impurity having a second amount in the first region of the second semiconductor layer, the second amount being less than the first amount;   selectively ion-implanting a second conductive type impurity into a second region of the second semiconductor layer, the second region of the second semiconductor layer being positioned above the second region of the first semiconductor layer, the second conductive type impurity having the same amount in the second region of the second semiconductor layer as the second amount of the first conductive type impurity in the first region of the second semiconductor layer,   forming a third semiconductor layer on the second semiconductor layer;   selectively ion-implanting a first conductive type impurity into a first region of the third semiconductor layer, the first region of the third semiconductor layer being positioned above the first region of the second semiconductor layer, the first conductive type impurity having a third amount in the first region of the third semiconductor layer, the third amount being more than the second amount;   selectively ion-implanting a second conductive type impurity into a second region of the third semiconductor layer, the second region of the third semiconductor layer being positioned above the second region of the second semiconductor layer, the second conductive type impurity having the same amount in the second region of the third semiconductor layer as the third amount of the first conductive type impurity in the first region of the third semiconductor layer.   
     
     
         2 . The method according  claim 1 , wherein
 the first semiconductor layer is formed in a plurality, the plurality of first semiconductor layers being stacked in a second direction crossing the first direction, the plurality of first semiconductor layers each including the first region and the second region, the first region including the first conductive type impurity, the second region including the second conductive type impurity;   the second semiconductor layer being formed on an uppermost first semiconductor layer of the plurality of first semiconductor layer;   the third semiconductor layer is formed in a plurality, the plurality of third semiconductor layer being stacked in the second direction on the second semiconductor layer, the plurality of third semiconductor layers each including the first region and the second region, the first region including the first conductive type impurity, the second region including the second conductive type impurity; and   the first regions and the second regions are aligned respectively in the second direction.   
     
     
         3 . The method according  claim 2 , wherein
 the plurality of first semiconductor layers has a first stacked width in the second direction;   the plurality of second semiconductor layers has a second stacked width in the second direction; and   the first stacked width is wider than the second stacked width.   
     
     
         4 . The method according  claim 2 , wherein
 the plurality of first semiconductor layers has a first stacked width in the second direction;   the plurality of second semiconductor layers has a second stacked width in the second direction; and   a ratio of the second stacked width to the first stacked width is 1:3.   
     
     
         5 . The method according  claim 2 , wherein
 the plurality of first semiconductor layers has a first stacked width in the second direction;   the plurality of second semiconductor layers has a second stacked width in the second direction; and   a ratio of the second stacked width to the first stacked width is 0.6:3.