Parallel video encoding

Abstract

An electronic device includes a slice splitter for splitting video data into a plurality of slices. Each slice contains a plurality of data blocks of multiple data streams, and each data block contains a plurality of data points. The electronic device further includes a plurality of video encoding circuits for concurrently encoding the data blocks of the multiple data streams to obtain encoded data streams and combining the encoded data streams into a combined data stream. The plurality of video encoding circuits include a frequency transformer for transforming the data blocks into frequency coefficients, a quantizer for quantizing the frequency coefficients obtained from the frequency transformer to obtain quantized frequency coefficients, a slice encoder for encoding the quantized frequency coefficients obtained from the quantizer concurrently, and a rate controller for controlling a quantization rate of the quantizer based on at least information from the slice encoder.

1 . (canceled) 
     
     
         2 . An electronic device comprising:
 a slice splitter configured to split video data into a plurality of slices, each slice containing a plurality of data blocks of a plurality of data streams, and each data block containing a plurality of data points; and   a plurality of video encoding circuits configured to concurrently encode the plurality of data blocks of the plurality of data streams to obtain encoded data streams and combine the encoded data streams into a combined data stream, the plurality of video encoding circuits including:
 a frequency transformer configured to transform the plurality of data blocks into a plurality of frequency coefficients; 
 a quantizer configured to quantize the plurality of frequency coefficients obtained from the frequency transformer to obtain a plurality of quantized frequency coefficients; 
 a slice encoder configured to encode the plurality of quantized frequency coefficients obtained from the quantizer concurrently; and 
 a rate controller configured to control a quantization rate of the quantizer based on at least information from the slice encoder. 
   
     
     
         3 . The electronic device of  claim 2 , wherein the plurality of video encoding circuits are configured to operate concurrently. 
     
     
         4 . The electronic device of  claim 3 , wherein the plurality of video encoding circuits are configured to operate according to a common operating clock. 
     
     
         5 . The electronic device of  claim 3 , wherein the plurality of video encoding circuits are configured to operate not according to a common operating clock. 
     
     
         6 . The electronic device of  claim 2 , wherein the frequency transformer is configured to perform a discrete cosine transform (DCT) on the plurality of data blocks. 
     
     
         7 . The electronic device of  claim 6 , wherein the plurality of frequency coefficients transformed from the plurality of data blocks within one slice are scanned in a frequency-first order or a block-first order. 
     
     
         8 . The electronic device of  claim 2 , wherein the plurality of quantized frequency coefficients obtained from the plurality of data blocks within one slice are scanned in a frequency-first order or a block-first order. 
     
     
         9 . The electronic device of  claim 2 , wherein a combined encoding rate of the slice encoder in encoding the plurality of data streams concurrently matches a combined transforming rate of the frequency transformer in transforming the data blocks. 
     
     
         10 . The electronic device of  claim 2 , wherein a combined encoding rate of the slice encoder that encodes the plurality of data streams concurrently matches the quantization rate of the quantizer in quantizing the plurality of frequency coefficients. 
     
     
         11 . The electronic device of  claim 2 , wherein the information from the slice encoder includes a least one of:
 a length of encoded data for one slice; or   clock cycles taken to encode of one slice.   
     
     
         12 . The electronic device of  claim 2 , wherein the rate controller is further configured to control the quantization rate of the quantizer further based on at least information from information from an image signal processor and registers of the plurality of video encoding circuits. 
     
     
         13 . The electronic device of  claim 2 , wherein the rate controller is further configured to control the quantization rate of the quantizer by controlling a quantization step size used by the quantizer. 
     
     
         14 . The electronic device of  claim 13 , wherein the rate controller is further configured to uses information from encoding of a current slice or one or more encoded slices to control a quantization step size used by the quantizer for subsequent slices. 
     
     
         15 . The electronic device of  claim 2 , wherein the slice encoder is further configured to encode the plurality of quantized frequency coefficients, a quantization step size of the quantizer, and motion information. 
     
     
         16 . The electronic device of  claim 2 , further comprising:
 a bit stream memory access circuit configured to cause the combined data stream to be stored in a buffer at a first memory location; and   a header memory access circuit configured to cause slice information from the encoding to be stored in a second memory location relative to the first memory location.   
     
     
         17 . The electronic device of  claim 16 , wherein the slice information is contained in a slice index table. 
     
     
         18 . The electronic device of  claim 16 , wherein:
 the bit stream memory access circuit and the header memory access circuit are coupled to an external storage via one or more bus connections; and   one of the bit stream memory access circuit and the header memory access circuit is further configured to transmit data to the external storage upon obtaining a permission.   
     
     
         19 . The electronic device of  claim 18 , wherein the header memory access circuit is further configured to cause the external storage to be notified of a difference between a byte length of the slice information and a byte length of the one or more bus connections. 
     
     
         20 . A method for encoding video data comprising:
 splitting video data into a plurality of slices, each slice containing a plurality of data blocks of a plurality of data streams, and each data block containing a plurality of data points;   concurrently encoding the plurality of data blocks of the plurality of data streams to obtain encoded data streams and combining the encoded data streams into a combined data stream, including:
 performing frequency transform on the plurality of data blocks to transform the data blocks into a plurality of frequency coefficients; 
 quantizing the plurality of frequency coefficients obtained from the frequency transformer to obtain a plurality of quantized frequency coefficients; 
 encoding the plurality of quantized frequency coefficients obtained from the quantizer concurrently; and 
 controlling a quantization rate of the quantizer based on at least information from the slice encoder. 
   
     
     
         21 . An unmanned aircraft comprising:
 a propulsion unit configured to effect a movement of the unmanned aircraft;   a camera configured to generate video data;   a slice splitter configured to split video data into a plurality of slices, each slice containing a plurality of data blocks of a plurality of data streams, and each data block containing a plurality of data points; and   a plurality of video encoding circuits configured to concurrently encode the plurality of data blocks of the plurality of data streams to obtain encoded data streams and combine the encoded data streams into a combined data stream, the plurality of video encoding circuits including:
 a frequency transformer configured to transform the plurality of data blocks into a plurality of frequency coefficients; 
 a quantizer configured to quantize the plurality of frequency coefficients obtained from the frequency transformer to obtain a plurality of quantized frequency coefficients; 
 a slice encoder configured to encode the plurality of quantized frequency coefficients obtained from the quantizer concurrently; and 
 a rate controller configured to control a quantization rate of the quantizer based on at least information from the slice encoder.