Memory device

Abstract

A memory device includes a conductive layer, a plurality of first electrode layers, a first semiconductor layer extending through the plurality of first electrode layers in a first direction toward the plurality of first electrode layers from the conductive layer, a first insulating film including a tunneling insulator film, a charge-trapping film and a blocking insulator film, a second electrode layer, and a semiconductor base. The charge-trapping film is spaced along the first direction from the semiconductor base, a distance in the first direction between the charge-trapping film and the semiconductor base is larger than a thickness of the blocking insulator film in a second direction toward the plurality of first electrode layers from the first semiconductor layer.

What is claimed is: 
     
         1 . A manufacturing method of a nonvolatile semiconductor memory device comprising:
 forming a conductive layer;   forming first layers and second layers alternately in a first direction above the conductive layer, the first direction being perpendicular to a surface of the conductive layer;   forming a first hole in the first layers and the second layers, the first hole extending in the first direction;   forming an insulating film in the first hole;   forming an sacrificial material in the first hole, the insulating film being between the conductive layer and the sacrificial material;   forming third layers and fourth layers alternately in the first direction above the first and second layers;   forming a second hole in the third layers and the fourth layers, the second hole extending in the first direction to reach the sacrificial material;   removing the sacrificial material through the second hole; and   forming a memory layer in the first hole and the second hole.   
     
     
         2 . The manufacturing method according to  claim 1 , further comprising:
 forming a semiconductor layer on the memory layer in the first hole and the second hole.   
     
     
         3 . The manufacturing method according to  claim 1 , further comprising:
 forming a semiconductor base on the conductive layer in the first hole.   
     
     
         4 . The manufacturing method according to  claim 3 , wherein the insulating film is formed on the semiconductor base. 
     
     
         5 . The manufacturing method according to  claim 3 , wherein the insulating film is formed by oxidizing a portion of the semiconductor base. 
     
     
         6 . The manufacturing method according to  claim 3 , wherein the semiconductor base includes the same material as a material of the sacrificial material. 
     
     
         7 . The manufacturing method according to  claim 3 , wherein the semiconductor base and the sacrificial material each include silicon. 
     
     
         8 . The manufacturing method according to  claim 1 , further comprising:
 forming a slit in the first layers, the second layers, the third layers and the fourth layers,   removing the first layers and the third layers through the slit to form spaces; and   forming conductive materials in the spaces.   
     
     
         9 . The manufacturing method according to  claim 3 , further comprising:
 forming a slit in the first layers, the second layers, the third layers and the fourth layers;   removing the first layers and the third layers through the slit to form spaces; and   forming conductive materials in the spaces.   
     
     
         10 . The manufacturing method according to  claim 9 , further comprising:
 forming a gate insulating film on a side surface of the semiconductor base exposed after removing the first layers and the third layers and before forming the conductive materials.   
     
     
         11 . The manufacturing method according to  claim 9 , wherein the gate insulating film is formed by oxidizing a portion of the semiconductor base. 
     
     
         12 . The manufacturing method according to  claim 1 , further comprising:
 forming an inter-layer insulating layer above the first layers and the second layers; and   forming a connection hole in the inter-layer insulating layer before forming the sacrificial material, the connection hole having a larger diameter than a diameter of the first hole.   
     
     
         13 . The manufacturing method according to  claim 1 , wherein the memory layer includes a blocking insulating layer, a charge trap layer and a tunneling insulating layer. 
     
     
         14 . A manufacturing method of a nonvolatile semiconductor memory device comprising:
 forming a conductive layer;   forming first layers and second layers alternately in a first direction above the conductive layer, the first direction being perpendicular to a surface of the conductive layer;   forming a first hole in the first layers and the second layers, the first hole extending in the first direction;   forming a semiconductor base on the conductive layer in the first hole   forming an insulating film on the semiconductor base in the first hole;   forming an sacrificial material in the first hole, the insulating film being between the conductive layer and the sacrificial material;   forming third layers and fourth layers alternately in the first direction above the first and second layers;   forming a second hole in the third layers and the fourth layers, the second hole extending in the first direction to reach the sacrificial material;   removing the sacrificial material through the second hole;   forming a memory layer in the first hole and the second hole; and   forming a semiconductor layer on the memory layer in the first hole and the second hole.   
     
     
         15 . The manufacturing method according to  claim 14 , wherein the insulating film is formed by oxidizing a portion of the semiconductor base. 
     
     
         16 . The manufacturing method according to  claim 14 , wherein the semiconductor base and the sacrificial material each include silicon. 
     
     
         17 . The manufacturing method according to  claim 14 , further comprising:
 forming a slit in the first layers, the second layers, the third layers and the fourth layers;   removing the first layers and the third layers through the slit to form spaces; and   forming conductive materials in the spaces.   
     
     
         18 . The manufacturing method according to  claim 14 , further comprising:
 forming a gate insulating film on a side surface of the semiconductor base exposed after removing the first layers and the third layers and before forming the conductive materials by oxidizing a portion of the semiconductor base.   
     
     
         19 . The manufacturing method according to  claim 14 , further comprising:
 forming an inter-layer insulating layer above the first layers and the second layers; and   forming a connection hole in the inter-layer insulating layer before forming the sacrificial material, the connection hole having a larger diameter than a diameter of the first hole.   
     
     
         20 . The manufacturing method according to  claim 14 , wherein the memory layer includes a blocking insulating layer, a charge trap layer and a tunneling insulating layer.