Display device and associated method

Abstract

A display device includes a substrate includes a first emitter and a second emitter thereon. The first emitter includes a first lower active quantum well (QW) region that has a first emission spectrum spanning a first spectral range. The second emitter includes (i) an upper active QW region that has a second emission spectrum spanning a second spectral range that is distinct from the first spectral range, (ii) a second lower active QW region having the first emission spectrum and being located between the upper active QW region and the substrate, and (iii) a barrier layer between the second lower active QW region and the upper active QW region for suppressing emission of the second lower active QW region.

What is claimed is: 
     
         1 . A display device comprising:
 a substrate including a first emitter and a second emitter thereon;   the first emitter including a first lower active quantum well (QW) region that has a first emission spectrum spanning a first spectral range,   the second emitter including (i) an upper active QW region that has a second emission spectrum spanning a second spectral range that is distinct from the first spectral range, (ii) a second lower active QW region having the first emission spectrum and being located between the upper active QW region and the substrate, and (iii) a barrier layer between the second lower active QW region and the upper active QW region for suppressing emission of the second lower active QW region.   
     
     
         2 . The display device of  claim 1 , each of the first and second lower active QW regions being characterized by a first set of lattice parameters, the upper active QW region being characterized by a second set of lattice parameters that differ from a respective parameter of the first set of lattice parameters by less than five percent. 
     
     
         3 . The display device of  claim 2 , further comprising a hole blocking layer between the second lower active QW region between and the upper active QW region. 
     
     
         4 . The display device of  claim 3 , the hole blocking layer including an n-type semiconductor material. 
     
     
         5 . The display device of  claim 1 , the barrier layer including an n-type semiconductor material. 
     
     
         6 . The display device of  claim 1 ,
 the first emitter having a first height with respect to a top surface of the substrate;   the substrate defining a recess that extends into the substrate, the second emitter being at least partially contained within in the recess such that a height of the second emitter with respect to the top surface equals the first height.   
     
     
         7 . The display device of  claim 6 , wherein a depth of the recess with respect to the top surface is substantially equal to the first height. 
     
     
         8 . The display device of  claim 6 , the substrate defining an additional recess that extends into the substrate, the first emitter being at least partially contained within the additional recess. 
     
     
         9 . The display device of  claim 1 , the second emitter being adjacent to the first emitter in a first direction parallel to a top surface of the substrate, and at least one of:
 a width of the second lower active QW region exceeding a width of the first lower active QW region in the first direction; and   a cross-sectional area of the second lower active QW region in a plane parallel to the top surface exceeding a cross-sectional area of the first lower active QW region.   
     
     
         10 . The display device of  claim 1 , further comprising:
 a plurality of additional first emitters that, with the first emitter, form an array of first emitters; and   a plurality of additional second emitters that, with the second emitter, form an array of second emitters that is interleaved with the array of first emitters.   
     
     
         11 . The display device of  claim 1 ,
 the first emitter and the second emitter including at least one of (i) a respective p-doped semiconductor layer and (ii) a respective ohmic contact layer.   
     
     
         12 . A method for forming a plurality of light emitters, the method comprising:
 forming a first recess on substrate, the first recess having a first width and a first depth;   forming a second recess on the substrate, the second recess having a second width and a second depth, at least one of the second width and the second depth being larger than the first width and first depth, respectively;   depositing a first n-type barrier material on the substrate;   fabricating a first active quantum well (QW) structure on the first n-type barrier material;   depositing a second n-type barrier material on the first active QW structure;   fabricating a second active QW structure on the second n-type barrier material; and   depositing a third n-type barrier material on the second active QW structure;   wherein the first width and first depth of the first recess are configured to prevent formation of the second active QW structure within the first recess such that the first n-type barrier material, the first active QW structure, and the second n-type barrier layer form a first light emitter, and   wherein the second width and second depth of the second recess are configured for supporting the first n-type barrier material, the first active QW structure, the second n-type barrier material, the second active QW structure, and the third n-type barrier material within, and at least partially contained within, the second recess to form a second light emitter.   
     
     
         13 . The method of  claim 12 , further comprising, after depositing the first n-type barrier material and prior to fabricating the first active QW structure:
 depositing a first n-type hole blocking layer (HBL) on the first n-type barrier material.   
     
     
         14 . The method of  claim 13 , further comprising, after depositing the second n-type barrier material and prior to fabricating the second active QW structure:
 depositing a second n-type HBL on the second n-type barrier material.   
     
     
         15 . The method of  claim 12 , further comprising, after depositing the second n-type barrier material and prior to fabricating the second active QW structure:
 depositing a n-type hole blocking layer (HBL) on the second n-type barrier material.   
     
     
         16 . The method of  claim 12 , further comprising:
 electrically isolating the first recess from the second recess such that the first recess supports the first emitter, while the second recess supports the second emitter, such that the first emitter is electrically isolated from the second LED emitter.   
     
     
         17 . The method of  claim 16 , further comprising:
 depositing a p-type layer on each one of the first and second LED structures; and   forming a p-type ohmic contact on each one of the first and second LED structures.   
     
     
         18 . The method of  claim 12 , each step of depositing and fabricating being executed in a single epitaxial growth pass.