Transistor and display device

Abstract

To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a gate electrode layer;   a gate insulating layer adjacent to the gate electrode layer;   an oxide semiconductor layer adjacent to the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer including a channel region; and   an oxide insulating layer in contact with the oxide semiconductor layer,   wherein the oxide semiconductor layer is between the gate insulating layer and the oxide insulating layer,   wherein the oxide semiconductor layer comprises indium, zinc, and gallium,   wherein at least part of the channel region includes crystals which are c-axis oriented in a direction perpendicular to a surface of the oxide semiconductor layer, and   wherein a size of the crystals is 20 nm or less in a direction along a short axis direction.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein the semiconductor device further comprises a source electrode and a drain electrode,   wherein the oxide semiconductor layer comprises a first region and a second region,   wherein the source electrode is in direct contact with the first region,   wherein the drain electrode is in direct contact with the second region,   wherein the channel region is between the first region and the second region, and   wherein the channel region comprises more oxygen than in the first region or the second region   
     
     
         4 . The semiconductor device according to  claim 2 , wherein the oxide semiconductor layer is formed over the gate electrode layer. 
     
     
         5 . The semiconductor device according to  claim 2 , wherein the part of the channel region includes a superficial portion of the oxide semiconductor layer. 
     
     
         6 . The semiconductor device according to  claim 2 ,
 wherein the oxide insulating layer comprises a first oxide insulating layer and a second oxide insulating layer,   wherein the first oxide insulating layer comprises silicon nitride, and   wherein the second oxide insulating layer comprises silicon oxide.   
     
     
         7 . A semiconductor device comprising:
 a gate electrode layer;   a gate insulating layer adjacent to the gate electrode layer;   an oxide semiconductor layer adjacent to the gate electrode layer with the gate insulating layer therebetween, and   an oxide insulating layer in contact with the oxide semiconductor layer,   wherein the oxide semiconductor layer is between the gate insulating layer and the oxide insulating layer,   wherein the oxide semiconductor layer comprises indium, zinc, and a first metal which is different from indium and zinc,   wherein the oxide semiconductor layer comprises a first region and a second region,   wherein the first region of the oxide semiconductor layer comprises nano crystals, and   wherein at least part of the second region includes crystals which are c-axis oriented in a direction perpendicular to a surface of the oxide semiconductor layer.   
     
     
         8 . The semiconductor device according to  claim 7 , wherein a size of the crystals is 20 nm or less in a direction along a short axis direction. 
     
     
         9 . The semiconductor device according to  claim 7 , wherein the oxide semiconductor layer is formed over the gate electrode layer. 
     
     
         10 . The semiconductor device according to  claim 7 ,
 wherein the oxide insulating layer comprises a first oxide insulating layer and a second oxide insulating layer,   wherein the first oxide insulating layer comprises silicon nitride, and   wherein the second oxide insulating layer comprises silicon oxide.   
     
     
         11 . The semiconductor device according to  claim 7 , wherein the first metal is gallium. 
     
     
         12 . The semiconductor device according to  claim 7 , wherein the second region is over the first region. 
     
     
         13 . A semiconductor device comprising:
 a gate electrode layer;   a gate insulating layer adjacent to the gate electrode layer;   an oxide semiconductor layer adjacent to the gate electrode layer with the gate insulating layer therebetween, and   an oxide insulating layer in contact with the oxide semiconductor layer,   wherein the oxide semiconductor layer is between the gate insulating layer and the oxide insulating layer,   wherein the oxide semiconductor layer comprises indium, zinc, and a first metal element which is different from indium and zinc, and   wherein electron diffraction pattern of the oxide semiconductor layer indicates crystals which are c-axis oriented in a direction perpendicular to a surface of the oxide semiconductor layer.   
     
     
         14 . The semiconductor device according to  claim 13 , wherein the oxide semiconductor layer is formed over the gate electrode layer. 
     
     
         15 . The semiconductor device according to  claim 13 ,
 wherein the oxide insulating layer comprises a first oxide insulating layer and a second oxide insulating layer,   wherein the first oxide insulating layer comprises silicon nitride, and   wherein the second oxide insulating layer comprises silicon oxide.   
     
     
         16 . The semiconductor device according to  claim 13 , wherein the first metal element is gallium. 
     
     
         17 . A semiconductor device comprising:
 an oxide semiconductor layer; and   an oxide insulating layer in contact with the oxide semiconductor layer,   wherein the oxide semiconductor layer comprises indium, zinc, and gallium,   wherein at least part of the oxide semiconductor layer comprises crystals which are c-axis oriented in a direction perpendicular to a surface of the oxide semiconductor layer, and   wherein a size of the crystals is 20 nm or less in a direction along a short axis direction.