Systems and methods for downloading code and data into a secure non-volatile memory

Abstract

An example secure embedded device includes a secure non-volatile memory coupled to a processor. The processor provides a scramble or cipher key and uses a scramble algorithm or a cipher algorithm to scramble or cipher information received from an external device into transformed information. The processor writes a least a portion of the transformed information to a plurality of memory locations of the secure non-volatile memory. The plurality of memory locations is based on the scramble or cipher key.

1 - 20 . (canceled) 
     
     
         21 . A secure embedded device, comprising:
 a first memory comprising a transformation mechanism;   a second memory coupled to the first memory, the second memory to store a software program and receive information; and   a processor coupled to the first memory and the second memory, the processor configured to execute the software program to at least one of:   
       generate a transformation key; or
 transfer the information from the second memory to the first memory, 
 wherein the first memory is to: 
 use the transformation mechanism and an algorithm to transform the information transferred from the second memory into transformed information; and 
 write the portion of the transformed information to a memory location of the first memory. 
 
     
     
         22 . The secure embedded device of  claim 21 , wherein the first memory is further to write a second portion of the transformed information to a second memory location determined based on the transformation key. 
     
     
         23 . The secure embedded device of  claim 21 , wherein the first memory comprises a number generator configured to generate a random or pseudo-random number, wherein the transformation key is based on the random or pseudo random number. 
     
     
         24 . The secure embedded device of  claim 21 , wherein the information comprises at least one of boot code or authentication information. 
     
     
         25 . The secure embedded device of  claim 21 , wherein the first memory is a secure non-volatile memory. 
     
     
         26 . The secure embedded device of  claim 21 , wherein the second memory is a temporary memory. 
     
     
         27 . The secure embedded device of  claim 21 , wherein the first memory is further to:
 determine the memory location of the first memory by applying the transformation key to a memory address of the first memory.   
     
     
         28 . The secure embedded device of  claim 21 , where the transformation key is a scramble or cipher key. 
     
     
         29 . A system comprising:
 a first device configured to provide information and a software program; and   a secure embedded device comprising a system interface to receive the information and the software program from the first device, the secure embedded device comprising a first memory, a second memory to store the information and the software program, and a processor coupled to the first memory and the second memory, the processor configured to execute the software program to:   
       generate a transformation key; and
 provide the information from the second memory to the first memory, 
 wherein the first memory is to: 
 use a transformation mechanism of the first memory to transform the information transferred from the second memory into transformed information; and 
 write the portion of the transformed information to a memory location of the first memory. 
 
     
     
         30 . The system of  claim 29 , wherein the first memory is further to write a second portion of the transformed information to a second memory location determined based on the transformation key. 
     
     
         31 . The system of  claim 29 , wherein the secure embedded device further comprises a number generator configured to generate a random or pseudo-random number. 
     
     
         32 . The system of  claim 31 , the processor configured to execute the software program to:
 initialize the transformation key.   
     
     
         33 . The system of  claim 32 , wherein the initialization of the transformation key is based on the generated random or pseudo-random number. 
     
     
         34 . The system of  claim 29 , wherein the information received from the first device comprises at least one of boot code or authentication information. 
     
     
         35 . The system of  claim 29 , wherein the processor is configured to determine that the information has not been corrupted by authenticating a signature or checksum associated with the information. 
     
     
         36 . The system of  claim 29 , wherein the first memory is configured to descramble or decipher the transformed information, using the transformation key, to generate the information. 
     
     
         37 . The system of  claim 29 , wherein the first memory is a secure non-volatile memory. 
     
     
         38 . The system of  claim 29 , wherein the second memory is a temporary memory. 
     
     
         39 . The system of  claim 29 , wherein the first memory is further to:
 determine the memory location of the first memory by applying the transformation key to a memory address of the first memory.