System and method for alignment of an integrated circuit

Abstract

The integrated circuit assembly can include: a semiconductor and a substrate (e.g., PCB). The integrated circuit assembly can optionally include: a compliant connector, a thermal management, and a securing element. The semiconductor 210 can include a first alignment feature. (e.g., orifice). The substrate can include a second alignment feature (e.g., alignment target) and conductive pads. The substrate can optionally include a cavity.

We claim: 
     
         1 . A system comprising:
 an integrated circuit comprising:
 a semiconductor defining a front face, a back face, and an orifice extending between the front and back faces; and 
 a die formed at the front face; and 
   a printed circuit board (PCB) having a first side electrically connected to the die and defining a cavity extending through a partial thickness of the PCB, wherein a remaining thickness of the PCB between a base of the cavity and the first side is translucent, wherein the PCB comprises a contrast material arranged along the first side and aligned with the cavity and the orifice.   
     
     
         2 . The system of  claim 1 , wherein a remaining thickness of the PCB between a base of the cavity and the front PCB face has greater optical transparency than the partial thickness of the PCB. 
     
     
         3 . The system of  claim 2 , wherein the first side comprises a first broad surface, wherein the PCB is opaque at a second broad surface. 
     
     
         4 . The system of  claim 1 , wherein the orifice defines a smaller cross-section at the back face than at the front face. 
     
     
         5 . The system of  claim 4 , wherein the contrast material is aligned relative to the cross-section of the orifice at the back face. 
     
     
         6 . The system of  claim 4 , wherein the orifice defines a first draft angle proximal the front face and a second draft angle proximal the back face, wherein the first draft angle is greater than the second draft angle. 
     
     
         7 . The system of  claim 1 , wherein an area of the base of the cavity is larger than a cross-sectional area of the orifice. 
     
     
         8 . The system of  claim 1 , wherein the contrast material is offset from a color of the PCB by greater than a threshold color distance. 
     
     
         9 . The system of  claim 1 , further comprising: a compliant connector arranged between the front face of the semiconductor and the first side of the PCB, the compliant connector electrically connecting the die to the PCB. 
     
     
         10 . The system of  claim 9 , wherein the semiconductor further comprises a first plurality of conductive pads arranged along the front face and electrically connected to the die; wherein the PCB further comprises a second plurality of conductive pads arranged along the first side, wherein the compliant connector electrically connects each conductive pad of the first plurality to a respective conductive pad of the second plurality based on the alignment of the contrast material and the orifice. 
     
     
         11 . The system of  claim 10 , wherein the integrated circuit further comprises a second die communicatively connected to the die, wherein the first plurality of conductive pads comprise off-die connections, wherein the second die is indirectly connected to the PCB by the first plurality of conductive pads. 
     
     
         12 . The system of  claim 10 , wherein the contrast material deviates from a central axis of the orifice by less than a spacing between pairs of adjacent conductive pads of the first plurality. 
     
     
         13 . The system of  claim 9 , wherein the contrast material deviates from a central axis of the orifice by less than a threshold offset, wherein the threshold offset is based on a spacing between conductive elements of the compliant connector. 
     
     
         14 . The system of  claim 1 , further comprising a thermal management component arranged at the back face of the semiconductor substrate. 
     
     
         15 . The system of  claim 14 , wherein the thermal management component spans the orifice along the back face of the integrated circuit and is optically opaque. 
     
     
         16 . The system of  claim 14 , wherein the thermal management component defines a thickness which is greater than a combined thickness of the integrated circuit and the PCB. 
     
     
         17 . The system of  claim 14 , wherein the cavity and the thermal management component cooperatively enclose a volume of air. 
     
     
         18 . The system of  claim 1 , wherein the contrast material deviates from a central axis of the orifice by less than a threshold offset. 
     
     
         19 . The system of  claim 1 , wherein the integrated circuit further comprises a second die formed within the front face of semiconductor. 
     
     
         20 . The system of  claim 1 , wherein an alignment of the contrast material relative to the orifice is visually observable to an unaided human through the base of the cavity.