US2022027285A1PendingUtilityA1

Fine Grain Data Migration to or from Borrowed Memory

Assignee: MICRON TECHNOLOGY INCPriority: May 28, 2019Filed: Oct 7, 2021Published: Jan 27, 2022
Est. expiryMay 28, 2039(~12.8 yrs left)· nominal 20-yr term from priority
H04L 67/04H04L 67/568H04L 67/60H04L 67/535G06F 12/1009G06F 12/0802H04W 8/26G06F 2212/657H04M 1/72412G06F 12/0653H04L 67/12G06F 12/1027G06F 2212/2515H04L 69/40H04L 67/1097G06N 5/045G06N 5/043G06F 12/0893G06N 3/08H04L 67/2842
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Claims

Abstract

Systems, methods and apparatuses of fine grain data migration in using Memory as a Service (MaaS) are described. For example, a memory status map can be used to identify the cache availability of sub-regions (e.g., cache lines) of a borrowed memory region (e.g., a borrowed remote memory page). Before accessing a virtual memory address in a sub-region, the memory status map is checked. If the sub-region has cache availability in the local memory, the memory management unit uses a physical memory address converted from the virtual memory address to make memory access. Otherwise, the sub-region is cached from the borrowed memory region to the local memory, before the physical memory address is used.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A mobile device, comprising:
 a communication device configured to communicate over a cellular communications network to access a computing system;   at least one microprocessor; and   a first memory coupled within the mobile device to the at least one microprocessor;   wherein the mobile device is configured to:
 transmit, via the communication device, a request to borrow, from the computing system, an amount of a second memory of the computing system; 
 generate a memory map to map virtual memory addresses, used in instruction executions in the at least one microprocessor, to physical memories, including the first memory coupled locally to the at least one microprocessor and the amount of the second memory connected to the at least one microprocessor via the communication device; and 
 adjust the memory map, in response to access to a virtual memory address mapped to the amount of the second memory, to remap a unit of virtual memory addresses from being hosted in the amount of the second memory to being hosted in the first memory. 
   
     
     
         2 . The mobile device of  claim 1 , further configured to use a first region in the first memory to cache data stored in a second region in the amount of second memory borrowed from the computing system. 
     
     
         3 . The mobile device of  claim 2 , further configured to store a memory status map representative of, in the first memory, cache availability statuses of regions of virtual memory addresses. 
     
     
         4 . The mobile device of  claim 3 , further configured to, in response to a first virtual memory address being accessed by the at least one microprocessor:
 determine, based on the memory status map, that a third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory on the computing system but lacks cache availability in the first memory;   communicate, using the communication device, with the computing system to retrieve, from the amount of the second memory of the computing system, first data in the third region of virtual memory addresses;   write the first data in the first region in the first memory; and   update the memory status map to indicate the first data of the third region of virtual memory addresses having cache availability in the first memory.   
     
     
         5 . The mobile device of  claim 4 , further configured to, in response to a second virtual memory address being accessed by the at least one microprocessor:
 determine, based on the memory status map, that the third region of virtual memory addresses containing the second virtual memory address is mapped to the amount of the second memory on the computing system and has cache availability in the first memory; and   map the second virtual memory address to the first region in the first memory.   
     
     
         6 . The mobile device of  claim 4 , further configured to:
 generate a memory fault in response to a determination that the third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory of the computing system but lacks cache availability in the first memory.   
     
     
         7 . The mobile device of  claim 6 , wherein the memory fault is configured to cause the mobile device to retrieve the first data from the computing system. 
     
     
         8 . The mobile device of  claim 7 , further comprising:
 a memory management unit configured to, responsive to the memory fault, use the communication device to retrieve the first data from the computing system and store the first data into the first region in the first memory.   
     
     
         9 . The mobile device of  claim 6 , wherein the mobile device is configured via instructions injected into an application, the instructions when executed cause the mobile device to make the determination that the third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory of the computing system but lacks cache availability in the first memory. 
     
     
         10 . A method, comprising:
 communicating, by a communication device of a mobile device, over a cellular communications network to access a computing system;   transmitting, via the communication device, a request to borrow, from the computing system, an amount of a second memory of the computing system;   generate a memory map to map virtual memory addresses, used in instruction executions in at least one microprocessor of the mobile device, to physical memories, including a first memory coupled locally to the at least one microprocessor in the mobile device and the amount of the second memory connected to the at least one microprocessor via the communication device; and   adjusting the memory map, in response to access to a virtual memory address mapped to the amount of the second memory, to remap a unit of virtual memory addresses from being hosted in the amount of the second memory to being hosted in the first memory.   
     
     
         11 . The method of  claim 10 , further comprising:
 caching, in a first region of the first memory, data stored in a second region in the amount of second memory borrowed from the computing system.   
     
     
         12 . The method of  claim 11 , further comprising:
 storing a memory status map representative of, in the first memory, cache availability statuses of regions of virtual memory addresses.   
     
     
         13 . The method of  claim 12 , further comprising, in response to a first virtual memory address being accessed by the at least one microprocessor:
 determining, based on the memory status map, that a third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory on the computing system but lacks cache availability in the first memory;   communicating, using the communication device, with the computing system to retrieve, from the amount of the second memory of the computing system, first data in the third region of virtual memory addresses;   writing the first data in the first region in the first memory; and   updating the memory status map to indicate the first data of the third region of virtual memory addresses having cache availability in the first memory.   
     
     
         14 . The method of  claim 13 , further comprises, in response to a second virtual memory address being accessed by the at least one microprocessor:
 determining, based on the memory status map, that the third region of virtual memory addresses containing the second virtual memory address is mapped to the amount of the second memory on the computing system and has cache availability in the first memory; and   mapping the second virtual memory address to the first region in the first memory.   
     
     
         15 . The method of  claim 13 , further configured to:
 generating a memory fault in response to a determination that the third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory of the computing system but lacks cache availability in the first memory.   
     
     
         16 . The method of  claim 15 , further comprising:
 injecting instructions into an application, the instructions when executed cause the mobile device to make the determination that the third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory of the computing system but lacks cache availability in the first memory.   
     
     
         17 . A non-transitory computer storage medium storing instructions which, when executed in a mobile device, cause the mobile device to perform a method, comprising:
 communicating, by a communication device of the mobile device, over a cellular communications network to access a computing system;   transmitting, via the communication device, a request to borrow, from the computing system, an amount of a second memory of the computing system;   generate a memory map to map virtual memory addresses, used in instruction executions in at least one microprocessor of the mobile device, to physical memories, including a first memory coupled locally to the at least one microprocessor in the mobile device and the amount of the second memory connected to the at least one microprocessor via the communication device; and   adjusting the memory map, in response to access to a virtual memory address mapped to the amount of the second memory, to remap a unit of virtual memory addresses from being hosted in the amount of the second memory to being hosted in the first memory.   
     
     
         18 . The non-transitory computer storage medium of  claim 17 , wherein the method further comprises:
 caching, in a first region of the first memory, data stored in a second region in the amount of second memory borrowed from the computing system; and   storing a memory status map representative of, in the first memory, cache availability statuses of regions of virtual memory addresses.   
     
     
         19 . The non-transitory computer storage medium of  claim 18 , wherein the method further comprises:
 in response to a first virtual memory address being accessed by the at least one microprocessor:
 determining, based on the memory status map, that a third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory on the computing system but lacks cache availability in the first memory; 
 communicating, using the communication device, with the computing system to retrieve, from the amount of the second memory of the computing system, first data in the third region of virtual memory addresses; 
 writing the first data in the first region in the first memory; and 
 updating the memory status map to indicate the first data of the third region of virtual memory addresses having cache availability in the first memory; and 
   in response to a second virtual memory address being accessed by the at least one microprocessor:
 determining, based on the memory status map, that the third region of virtual memory addresses containing the second virtual memory address is mapped to the amount of the second memory on the computing system and has cache availability in the first memory; and 
 mapping the second virtual memory address to the first region in the first memory. 
   
     
     
         20 . The non-transitory computer storage medium of  claim 19 , wherein the method further comprises:
 injecting instructions into an application, the instructions when executed cause the mobile device to:
 make a determination that the third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory of the computing system but lacks cache availability in the first memory; and 
 generate a memory fault in response to the determination that the third region of virtual memory addresses containing the first virtual memory address is mapped to the amount of the second memory of the computing system but lacks cache availability in the first memory.

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