US2022033255A1PendingUtilityA1

Monolithically integrated multi-sensor device on a semiconductor substrate and method therefor

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Assignee: VERSANA MICRO INCPriority: Mar 15, 2013Filed: Oct 17, 2021Published: Feb 3, 2022
Est. expiryMar 15, 2033(~6.7 yrs left)· nominal 20-yr term from priority
H10F 99/00H10N 59/00B81B 2201/0264B81B 2207/012B81B 2207/05B81B 2201/0257B81B 7/02B81B 2201/0214B81B 2201/0228H05K 7/02B81B 2201/0278B81B 2201/0207B81B 2207/09H01L 27/14H01L 27/22H01L 27/16H01L 41/1138H01L 41/1132H01L 2924/00H10N 19/00H10B 61/00H10N 30/308H10N 30/302
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Claims

Abstract

A monolithically integrated multi-sensor (MIMS) is disclosed. A MIMs integrated circuit comprises a plurality of sensors. For example, the integrated circuit can comprise three or more sensors where each sensor measures a different parameter. The three or more sensors can share one or more layers to form each sensor structure. In one embodiment, the three or more sensors can comprise MEMs sensor structures. Examples of the sensors that can be formed on a MIMs integrated circuit are an inertial sensor, a pressure sensor, a tactile sensor, a humidity sensor, a temperature sensor, a microphone, a force sensor, a load sensor, a magnetic sensor, a flow sensor, a light sensor, an electric field sensor, an electrical impedance sensor, a galvanic skin response sensor, a chemical sensor, a gas sensor, a liquid sensor, a solids sensor, and a biological sensor.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A monolithically integrated multi-sensor (MIMS) having three or more sensors the MIMS comprising:
 a first MEMS sensor configured to measure a first parameter;   a second MEMS sensor configured to measure a second parameter;   a third sensor configured to measure a third parameter wherein the first, second, and third parameters are different, wherein the first, second, and third sensors are formed on or in a single semiconductor substrate using a monolithic semiconductor process, and wherein the a layer of the monolithic semiconductor process is common to the first, second, and third sensors.   
     
     
         2 . The MIMS of  claim 1  wherein the layer forms a static structural component in at least one of the first, second, or third sensors and wherein the layer forms a dynamic structural component in at least one of the first, second, or third sensors. 
     
     
         3 . The MIMS of  claim 2  wherein the layer is configured to form one or more pillars or one or more walls to support the static structural components for improved mechanical strength. 
     
     
         4 . The MIMS of  claim 2  wherein the dynamic structural component is a proof mass or a suspension spring. 
     
     
         5 . The MIMS of  claim 2  wherein the static structural component is an electrode. 
     
     
         6 . The MIMS of  claim 1  wherein the layer forms a protective cap structure. 
     
     
         7 . The MIMS of  claim 6  wherein the protective cap structure can be anchored to the single semiconductor substrate. 
     
     
         8 . The MIMS of  claim 1  wherein one or more openings can be formed in a field region or a sensor region of at least one of the first, second, or third sensors. 
     
     
         9 . The MIMS of  claim 8  wherein the one or more openings in the layer expose one or more sacrificial layers and wherein etchant is configured to couple to the one or more sacrificial layers through the one or more openings to remove the one or more sacrificial layers. 
     
     
         10 . The MIMS of  claim 9  wherein the removal of the one or more sacrificial layers is configured to release one of the first, second, or third sensors. 
     
     
         11 . The MIMS of  claim 10  wherein the one or more openings in the layer are covered after the removal of the one or more sacrificial layers. 
     
     
         12 . The MIMS of  claim 1  wherein the layer comprises polysilicon and wherein the one or more sacrificial layers comprises an oxide. 
     
     
         13 . The MIMS of  claim 1  wherein the layer of the monolithic semiconductor process is patterned and etched simultaneously on the first, second, and third sensors. 
     
     
         14 . The MIMS of  claim 1  further including a second layer common to the first, second, and third sensors. 
     
     
         15 . The MIMS of  claim 1  wherein the layer is an electrically conductive layer. 
     
     
         16 . The MIMS of  claim 1  wherein the layer is an electrically insulating layer. 
     
     
         17 . The MIMS of  claim 1  wherein the layer is a sacrificial layer. 
     
     
         18 . The MIMS of  claim 1  wherein the first, second, and third sensors are MEMS sensors. 
     
     
         19 . A monolithically integrated multi-sensor (MIMS) having three or more sensors the MIMS comprising:
 a first MEMS sensor configured to measure a first parameter;   a second MEMS sensor configured to measure a second parameter;   a third sensor configured to measure a third parameter wherein the first, second, and third parameters are different, wherein the first, second, and third sensors are formed on or in a single semiconductor substrate using a monolithic semiconductor process, wherein a layer of the monolithic semiconductor process is common to the first, second, and third sensors, wherein the layer forms a static structural component in at least one of the first MEMS sensor and wherein the layer forms a dynamic structural component in second MEMS sensor.   
     
     
         20 . A monolithically integrated multi-sensor (MIMS) having three or more sensors the MIMS comprising:
 a first MEMS sensor configured to measure a first parameter;   a second MEMS sensor configured to measure a second parameter;   a third MEMS sensor configured to measure a third parameter wherein the first, second, and third parameters are different, wherein the first, second, and third sensors are formed on or in a single semiconductor substrate using a monolithic semiconductor process, wherein the a layer of the monolithic semiconductor process is common to the first, second, and third sensors, wherein one or more openings in the layer can be formed in a field region or a sensor region of the at least one of the first, second, or third sensors, wherein the one or more openings in the layer expose one or more sacrificial layers and wherein etchant is configured to couple to the one or more sacrificial layers through the one or more openings to remove the one or more sacrificial layers.

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