Apparatus and method for improving graphics processing performance

Abstract

Apparatus and method for efficient graphics processing including ray tracing. For example, one embodiment of a graphics processor comprises: execution hardware logic to execute graphics commands and render images; an interface to couple functional units of the execution hardware logic to a tiled resource; and a tiled resource manager to manage access by the functional units to the tiled resource, a functional unit of the execution hardware logic to generate a request with a hash identifier (ID) to request access to a portion of the tiled resource, wherein the tiled resource manager is to determine whether a portion of the tiled resource identified by the hash ID exists, and if not, to allocate a new portion of the tiled resource and associate the new portion with the hash ID.

What is claimed is: 
     
         1 . An apparatus comprising:
 a tesselator to tessellate an input patch to a grid primitive comprising a plurality of interconnected quads, each quad comprising two implicit triangles and sharing at least two vertices with an adjacent quad;   a bounding box generator to construct a bounding box to bound each quad of the grid primitive to produce a plurality of bounding boxes corresponding to the plurality of interconnected quads; and   ray traversal hardware logic to determine if a ray traverses one or more of the plurality of bounding boxes; and   intersection hardware logic to process a bounding box traversed by the ray to determine if the ray intersects one of the implicit triangles represented by the quad which is bounded by the bounding box.   
     
     
         2 . The apparatus of  claim 1  wherein the grid primitive comprises an M×M matrix of vertices forming the plurality of interconnect quads. 
     
     
         3 . The apparatus of  claim 1  wherein the bounding box generator is integral to the ray traversal hardware logic or a bounding volume hierarchy (BVH) builder. 
     
     
         4 . The apparatus of  claim 1  wherein for a grid primitive comprising N quads, the bounding box generator is to generate an N-wide BVH node having a child node associated with each quad. 
     
     
         5 . The apparatus of  claim 1  wherein a bitmask is generated based on the grid primitive, each bit in the bitmask associated with one of the implicit triangles or one of the quads, wherein if a bit in the bitmask is set to 0, the associated implicit triangle or quad is considered invalid. 
     
     
         6 . The apparatus of  claim 1  further comprising:
 motion blur hardware logic to interpolate between a first representation of a first implicit triangle at a first time and a second representation of the first implicit triangle at a second time. 
 
     
     
         7 . The apparatus of  claim 1  wherein the grid primitive is one of a plurality of grid primitives, the apparatus further comprising:
 compression hardware logic to identify shared vertices of the plurality of grid primitives and to store only one set of vertex data for each shared vertex. 
 
     
     
         8 . The apparatus of  claim 7  wherein the compression hardware logic is to generate an index pointing to an array where the set of vertex data is stored. 
     
     
         9 . The apparatus of  claim 8  wherein the compression hardware logic is to identify one or more shared edges of the implicit triangles, the compression hardware logic to store a single set of edge data for each shared edge. 
     
     
         10 . A method comprising:
 tessellating an input patch to a grid primitive comprising a plurality of interconnected quads, each quad comprising two implicit triangles and sharing at least two vertices with an adjacent quad;   constructing a bounding box to bound each quad of the grid primitive to produce a plurality of bounding boxes corresponding to the plurality of interconnected quads; and   determining if a ray traverses one or more of the plurality of bounding boxes; and   processing a bounding box traversed by the ray to determine if the ray intersects one of the implicit triangles represented by the quad which is bounded by the bounding box.   
     
     
         11 . The method of  claim 10  wherein the grid primitive comprises an M×M matrix of vertices forming the plurality of interconnect quads. 
     
     
         12 . The method of  claim 10  wherein the bounding box generator is integral to the ray traversal hardware logic and/or a bounding volume hierarchy (BVH) builder. 
     
     
         13 . The method of  claim 10  wherein for a grid primitive comprising N quads, the bounding box generator is to generate an N-wide BVH node having a child node associated with each quad. 
     
     
         14 . The method of  claim 10  wherein a bitmask is generated based on the grid primitive, each bit in the bitmask associated with one of the implicit triangles or one of the quads, wherein if a bit in the bitmask is set to 0, the associated implicit triangle or quad is considered invalid. 
     
     
         15 . The method of  claim 10  a first representation of a first implicit triangle at a first time and a second representation of the first implicit triangle at a second time. 
     
     
         16 . The method of  claim 10  wherein the grid primitive is one of a plurality of grid primitives, the method further comprising:
 identifying shared vertices of the plurality of grid primitives and storing only one set of vertex data for each shared vertex. 
 
     
     
         17 . The method of  claim 16  further comprising:
 generating an index pointing to an array where the set of vertex data is stored. 
 
     
     
         18 . The method of  claim 17  further comprising:
 identifying one or more shared edges of the implicit triangles, and storing only a single set of edge data for each shared edge. 
 
     
     
         19 . A machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of:
 tessellating an input patch to a grid primitive comprising a plurality of interconnected quads, each quad comprising two implicit triangles and sharing at least two vertices with an adjacent quad;   constructing a bounding box to bound each quad of the grid primitive to produce a plurality of bounding boxes corresponding to the plurality of interconnected quads; and   determining if a ray traverses one or more of the plurality of bounding boxes; and   processing a bounding box traversed by the ray to determine if the ray intersects one of the implicit triangles represented by the quad which is bounded by the bounding box.   
     
     
         20 . The machine-readable medium of  claim 19  wherein the grid primitive comprises an M×M matrix of vertices forming the plurality of interconnect quads. 
     
     
         21 . The machine-readable medium of  claim 19  wherein the bounding box generator is integral to the ray traversal hardware logic and/or a bounding volume hierarchy (BVH) builder. 
     
     
         22 . The machine-readable medium of  claim 19  wherein for a grid primitive comprising N quads, the bounding box generator is to generate an N-wide BVH node having a child node associated with each quad. 
     
     
         23 . The machine-readable medium of  claim 19  wherein a bitmask is generated based on the grid primitive, each bit in the bitmask associated with one of the implicit triangles or one of the quads, wherein if a bit in the bitmask is set to 0, the associated implicit triangle or quad is considered invalid. 
     
     
         24 . The machine-readable medium of  claim 19  further comprising program code to cause the machine to perform the operations of:
 interpolating between a first representation of a first implicit triangle at a first time and a second representation of the first implicit triangle at a second time. 
 
     
     
         25 . The machine-readable medium of  claim 19  wherein the grid primitive is one of a plurality of grid primitives, the machine-readable medium further comprising program code to cause the machine to perform the operations of:
 identifying shared vertices of the plurality of grid primitives and storing only one set of vertex data for each shared vertex.