Semiconductor device and method for manufacturing same

Abstract

A semiconductor device includes a thin film transistor, wherein: a semiconductor layer of the thin film transistor has a layered structure including a lower oxide semiconductor layer including In, Ga, Zn and Sn and an upper oxide semiconductor layer arranged on the lower oxide semiconductor layer and including In, Ga and Zn; a thickness of the lower oxide semiconductor layer is 20 nm or less; an atomic ratio of Sn with respect to all metal elements of the lower oxide semiconductor layer is 5% or more; the upper oxide semiconductor layer includes no Sn, or an atomic ratio of Sn with respect to all metal elements of the upper oxide semiconductor layer is smaller than an atomic ratio of Sn with respect to all metal elements of the lower oxide semiconductor layer; and a first angle θ1 between a side surface and a lower surface of the lower oxide semiconductor layer is smaller than a second angle θ2 between a side surface and a lower surface of the upper oxide semiconductor layer.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate;   a thin film transistor supported on the substrate, the thin film transistor including a semiconductor layer, a gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode electrically connected to the semiconductor layer; and   an insulating layer covering the semiconductor layer or the thin film transistor, wherein:   the semiconductor layer has a layered structure including:
 a lower oxide semiconductor layer primarily including a quaternary oxide of an In—Ga—Zn—Sn—O-based semiconductor; and 
 an upper oxide semiconductor layer arranged at a position farther from the substrate than the lower oxide semiconductor layer and primarily including a ternary oxide of an In—Ga—Zn—O-based semiconductor; 
   a thickness of the lower oxide semiconductor layer is 5 nm or more and 20 nm or less;   an atomic ratio of Sn with respect to all metal elements included in the lower oxide semiconductor layer is 5% or more;   an atomic ratio of Sn with respect to all metal elements included in the upper oxide semiconductor layer is smaller than the atomic ratio of Sn with respect to the all metal elements included in the lower oxide semiconductor layer; and   as seen from a direction normal to the substrate, the semiconductor layer includes a source contact region electrically connected with the source electrode and a drain contact region electrically connected with the drain electrode, the upper oxide semiconductor layer being continuous between the source contact region and the drain contact region.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein an atomic ratio of Sn with respect to all metal elements included in the lower oxide semiconductor layer is 25% or less. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein an etching rate of the upper oxide semiconductor layer for a PAN (Phosphoric-Acetic-Nitric acid)-based etchant is 5 times or more and 50 times or less of that of the lower oxide semiconductor layer. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the gate electrode is arranged on a substrate side of the semiconductor layer, with the gate insulating layer interposed therebetween. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the gate electrode is arranged on an opposite side of the semiconductor layer away from the substrate, with the gate insulating layer interposed therebetween. 
     
     
         6 . The semiconductor device according to  claim 5 , the thin film transistor further including a lower electrode and a lower insulating layer; wherein
 the lower electrode is arranged on a substrate side of the semiconductor layer, with the lower insulating layer interposed therebetween   
     
     
         7 . The semiconductor device according to  claim 6 , wherein the lower electrode is a light blocking layer of the thin film transistor. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the upper oxide semiconductor layer includes a plurality of layers having different composition ratios. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein the upper oxide semiconductor layer includes a crystalline portion.