US2022095017A1PendingUtilityA1

Scalable light-weight protocols for wire-speed packet ordering

Assignee: NVIDIA CORPPriority: Nov 7, 2018Filed: Dec 1, 2021Published: Mar 24, 2022
Est. expiryNov 7, 2038(~12.3 yrs left)· nominal 20-yr term from priority
H04N 21/6583H04N 21/47217H04L 47/624H04N 21/4302H04L 45/7453H04N 21/2387H04L 47/283H04N 21/23406H04L 45/20
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Claims

Abstract

A communication method between a source device and a target device utilizes speculative connection setup between the source device and the target device, target-device-side packet ordering, and fine-grained ordering to remove packet dependencies.

Claims

exact text as granted — not AI-modified
1 - 25 . (canceled) 
     
     
         26 . A packet routing method between a source device and a target device, the method comprising:
 opening a connection with the target device in response to receiving a first received packet of a multi-packet out-of-order transfer from the source device;   storing packets of the transfer that arrived out-of-order from the source device in a reorder buffer;   forwarding packets of the transfer to the target device in an order they were received from the source device; and   closing the connection on condition that the target device has acknowledged all packets of the multi-packet out-of-order transfer.   
     
     
         27 . The method of  claim 26 , wherein the first received packet is not a first packet in the order of the multi-packet out-of-order transfer. 
     
     
         28 . The method of  claim 26 , further comprising:
 receiving a synchronization packet from the target device for the multi-packet out-of-order transfer; and   storing the synchronization packet in the reorder buffer before receiving a last packet of the multi-packet out-of-order transfer.   
     
     
         29 . The method of  claim 26 , further comprising:
 executing, in the target device, memory operations specified by packets of the multi-packet out-of-order transfer; and   as a result of completion of the memory operations, sending to the source device acknowledgement packets for the packets of the multi-packet out-of-order transfer.   
     
     
         30 . A packet router comprising:
 an input to receive data packets from a source device;   an output to forward packets to a target device;   a reorder buffer; and   logic to:
 open a connection with the target device in response to receiving an out-of-order packet of an ordered multi-packet transfer from the source device; 
 store the out-of-order packet in the reorder buffer; 
 on condition that all packets of the multi-packet transfer that precede the out-of-order packet in an order of the ordered multi-packet transfer are received and forwarded to the target device, forwarding the out-of-order packet to the target device; and 
   wherein packets of the ordered multi-packet transfer comprise memory operations in the target device and are not acknowledged to the source device until completion of the memory operations.   
     
     
         31 . The packet router of  claim 30 , wherein the out-of-order packet lacks a SYN flag. 
     
     
         32 . The packet router of  claim 30 , further comprising logic to identify the ordered multi-packet transfer using both of an identifier of the source device and a connection identifier. 
     
     
         33 . A system comprising:
 a first circuit;   a second circuit;   a packet router configured to route packets between the first circuit and the second circuit; the packet router configured to:
 open a connection to the second circuit in response to receiving an out-of-order packet of an ordered multi-packet transfer originating from the first circuit; 
 receive packets of the transfer that arrived out-of-order from the first circuit into a reorder buffer; 
 forward packets of the transfer to the second circuit in an order they are received; and 
 detect that the second circuit has acknowledged all packets of the transfer and in response close the connection. 
   
     
     
         34 . The system of  claim 33 , wherein the connection is opened as a result of a first received packet being not a first packet in the order of the transfer. 
     
     
         35 . The system of  claim 33 , the packet router further configured to:
 receive into the reorder buffer a synchronization packet for the transfer from the second circuit.   
     
     
         36 . The system of  claim 33 , wherein the packets specify memory operations in the second circuit. 
     
     
         37 . A packet routing method comprising:
 receiving an ordered packet sequence from a source device;   opening a connection to a destination device of the packet sequence in response to receiving an out-of-order packet of the ordered packet sequence;   storing the out-of-order packet in a reorder buffer;   on condition that all packets of the packet sequence that precede the out-of-order packet in an order of the ordered packet sequence are received and forwarded to the destination device, forwarding the out-of-order packet to the target device;   receipt of the packet sequence initiating memory operations in the destination device; and   acknowledging to the source device receipt of the packets by the destination device upon completion of the memory operations.

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