US2022139972A1PendingUtilityA1

Tft photodetector integrated on display panel

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Assignee: KIM HOONPriority: Aug 20, 2019Filed: Jan 13, 2022Published: May 5, 2022
Est. expiryAug 20, 2039(~13.1 yrs left)· nominal 20-yr term from priority
Inventors:Hoon Kim
H10F 39/8033H10K 59/65H10F 39/80H10F 77/16H10F 39/80377H10F 39/8037H10F 39/014H10F 30/282G06F 2203/04101G06F 2203/04103G06V 40/1318G06F 3/0412G02F 1/13338G06F 3/0421G02F 1/133606G02F 1/13318G06F 3/041662G06F 2203/04109G06F 3/04182H01L 31/036H01L 27/323H01L 27/1461H01L 27/14616H01L 27/14612H01L 31/1136H01L 27/3234H01L 27/14689H01L 27/3227H10K 59/60H10K 59/40
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Claims

Abstract

A method of fabricating a thin-film transistor (TFT) photodetector includes forming diffusion layers on a glass substrate or a transparent flexible substrate, wherein the diffusion layers include a P-type diffusion layer of P-type polycrystalline or amorphous silicon, for use as an active layer and P+-type diffusion layers of amorphous or polycrystalline silicon at both sides of the P-type diffusion layer, forming an insulating oxide layer on the formed diffusion layers, forming an N-type diffusion layer of polycrystalline or amorphous silicon on the insulating oxide film, forming a gate to be used as a light receiving part by photo-patterning the N-type diffusion layer, etching the generated insulating oxide layer except for only a necessary part in a photoresist (PR) patterning process, removing a remaining area of the P+-type diffusion layer except for areas to be used as a source and a drain by etching, and generating electrodes by depositing a metal in etched parts of the insulating oxide film in the source and the drain.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of fabricating a thin-film transistor (TFT) photodetector, the method comprising:
 forming diffusion layers on a glass substrate or a transparent flexible substrate, wherein the diffusion layers include a P-type diffusion layer of P-type polycrystalline or amorphous silicon, for use as an active layer and P+-type diffusion layers of amorphous or polycrystalline silicon at both sides of the P-type diffusion layer;   forming an insulating oxide layer on the formed diffusion layers;   forming an N-type diffusion layer of polycrystalline or amorphous silicon on the insulating oxide film;   forming a gate to be used as a light receiving part by photo-patterning the N-type diffusion layer;   etching the generated insulating oxide layer except for only a necessary part in a photoresist (PR) patterning process;   removing a remaining area of the P+-type diffusion layer except for areas to be used as a source and a drain by etching; and   generating electrodes by depositing a metal in etched parts of the insulating oxide film in the source and the drain.   
     
     
         2 . The method according to  claim 1 , wherein the insulating oxide film is formed by sputtering or plasma enhanced chemical vapor deposition (PECVD). 
     
     
         3 . The method according to  claim 1 , wherein the N-type diffusion layer is formed by depositing amorphous silicon and then crystallizing the deposited amorphous silicon by thermal treatment, or directly depositing polycrystalline silicon on the transparent substrate.

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