High voltage edge termination structure for power semicondcutor devices and manufacturing method thereof

Abstract

A high voltage edge termination structure for a power semiconductor device is provided. The high voltage edge termination structure comprises a semiconductor body of a first conductive type, a JTE region of a second conductive type, a heavily doped channel stop region of the first conductive type, and a plurality of field plates. The JTE region is formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device. The heavily doped channel stop region is formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region. The plurality of field plates is formed on the JTE region.

We claim: 
     
         1 . A high voltage edge termination structure for a power semiconductor device, comprising:
 a semiconductor body of a first conductive type;   a junction termination extension (JTE) region of a second conductive type formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device;   a heavily doped channel stop region of the first conductive type formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region; and   a plurality of field plates, formed on the JTE region.   
     
     
         2 . The high voltage edge termination structure for a power semiconductor device of  claim 1 , wherein the first conductivity type is N-type, and the second conductivity type is P-type. 
     
     
         3 . The high voltage edge termination structure for a power semiconductor device of  claim 1 , wherein the field plates are made of a metal material. 
     
     
         4 . The high voltage edge termination structure for a power semiconductor device of  claim 1 , wherein the field plates are made of P-type poly silicon. 
     
     
         5 . The high voltage edge termination structure for a power semiconductor device of  claim 1 , wherein the field plates are made of N-type poly silicon. 
     
     
         6 . A high voltage edge termination structure for a power semiconductor device, comprising:
 a semiconductor body of a first conductive type;   a JTE region of a second conductive type formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device;   a heavily doped channel stop region of the first conductive type formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region; and   a plurality of depletable guard rings of the second conductive type, formed in the semiconductor body, wherein the depletable guard rings are formed between the JTE region and the heavily doped channel stop region.   
     
     
         7 . The high voltage edge termination structure for a power semiconductor device of  claim 6 , wherein the first conductivity type is N-type, and the second conductivity type is P-type. 
     
     
         8 . A high voltage edge termination structure for a power semiconductor device, comprising:
 a semiconductor body of a first conductive type;   a JTE region of a second conductive type formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device;   a plurality of lightly doped regions of the second conductive type formed in the JTE region adjacent to an upper surface of the JTE region; and   a heavily doped channel stop region of the first conductive type formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region.   
     
     
         9 . The high voltage edge termination structure for a power semiconductor device of  claim 8 , wherein the first conductivity type is N-type, and the second conductivity type is P-type. 
     
     
         10 . The high voltage edge termination structure for a power semiconductor device of  claim 8 , wherein a lateral width of the lightly doped regions becomes larger along a direction toward the heavily doped channel stop region. 
     
     
         11 . The high voltage edge termination structure for a power semiconductor device of  claim 8 , wherein a space between the lightly doped region in a vicinity of the active region and the active region is greater than a space between the neighboring lightly doped regions. 
     
     
         12 . The high voltage edge termination structure for a power semiconductor device of  claim 8 , further comprising a plurality of field plates, formed on the JTE region. 
     
     
         13 . The high voltage edge termination structure for a power semiconductor device of  claim 12 , wherein the field plates are made of a metal material. 
     
     
         14 . The high voltage edge termination structure for a power semiconductor device of  claim 12 , wherein the field plates are made of P-type poly silicon. 
     
     
         15 . The high voltage edge termination structure for a power semiconductor device of  claim 12 , wherein the field plates are made of N-type poly silicon. 
     
     
         16 . A high voltage edge termination structure for a power semiconductor device, comprising:
 a semiconductor body of a first conductive type;   a JTE region of a second conductive type formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device;   a heavily doped channel stop region of the first conductive type formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region;   a plurality of depletable guard rings of the second conductive type, formed in the semiconductor body, wherein the depletable guard rings are formed between the JTE region and the heavily doped channel stop region; and   a plurality of lightly doped regions of the second conductive type formed in an upper portion of the JTE region and at least one of the depletable guard rings.   
     
     
         17 . The high voltage edge termination structure for a power semiconductor device of  claim 16 , wherein the first conductivity type is N-type, and the second conductivity type is P-type. 
     
     
         18 . The high voltage edge termination structure for a power semiconductor device of  claim 16 , wherein a lateral width of the lightly doped regions becomes larger along a direction toward the heavily doped channel stop region. 
     
     
         19 . The high voltage edge termination structure for a power semiconductor device of  claim 16 , wherein a space between the lightly doped region in a vicinity of the active region and the active region is greater than a space between the neighboring lightly doped regions. 
     
     
         20 . The high voltage edge termination structure for a power semiconductor device of  claim 16 , wherein a gap between the depletable guard rings increases along a direction toward the heavily doped channel stop region. 
     
     
         21 . The high voltage edge termination structure for a power semiconductor device of  claim 16 , further comprising a plurality of field plates, formed on the JTE region. 
     
     
         22 . The high voltage edge termination structure for a power semiconductor device of  claim 21 , wherein the field plates are made of a metal material. 
     
     
         23 . The high voltage edge termination structure for a power semiconductor device of  claim 21 , wherein the field plates are made of P-type poly silicon. 
     
     
         24 . The high voltage edge termination structure for a power semiconductor device of  claim 21 , wherein the field plates are made of N-type poly silicon. 
     
     
         25 . A method of manufacturing a high voltage edge termination structure for a power semiconductor device, comprising;
 forming a heavily doped channel stop region of the first conductive type in a semiconductor body of the first conductive type by ion implantation of the first conductive type;   forming a JTE region of a second conductive type in the semiconductor body by ion implantation of the second conductive type, wherein the JTE region is adjacent to an active region of the power semiconductor device and is spaced apart from the heavily doped channel stop region; and   forming a plurality of field plates on the JTE region.   
     
     
         26 . A method of manufacturing a high voltage edge termination structure for a power semiconductor device, comprising;
 forming a heavily doped channel stop region of the first conductive type in a semiconductor body of the first conductive type by ion implantation of the first conductive type;   forming a JTE region of a second conductive type in the semiconductor body by ion implantation of the second conductive type, wherein the JTE region is adjacent to an active region of the power semiconductor device and is spaced apart from the heavily doped channel stop region; and   forming a plurality of depletable guard rings of the second conductive type in the semiconductor body by ion implantation of the second conductive type, wherein the depletable guard rings are formed between the JTE region and the heavily doped channel stop region.   
     
     
         27 . The method of manufacturing a high voltage edge termination structure for a power semiconductor device of  claim 26 , wherein the JTE region and the depletable guard rings are simultaneously formed in the semiconductor body. 
     
     
         28 . A method of manufacturing a high voltage edge termination structure for a power semiconductor device, comprising;
 forming a heavily doped channel stop region of the first conductive type in a semiconductor body of the first conductive type by ion implantation of the first conductive type;   forming a JTE region of a second conductive type in the semiconductor body by ion implantation of the second conductive type, wherein the JTE region is adjacent to an active region of the power semiconductor device and is spaced apart from the heavily doped channel stop region; and   forming a plurality of lightly doped regions of the second conductive type in the JTE region adjacent to an upper surface of the JTE region by ion implantation of the first conductive type.   
     
     
         29 . The method of manufacturing a high voltage edge termination structure for a power semiconductor device of  claim 28 , further comprising forming a plurality of field plates on the JTE region. 
     
     
         30 . A method of manufacturing a high voltage edge termination structure for a power semiconductor device, comprising;
 forming a heavily doped channel stop region of the first conductive type in a semiconductor body of the first conductive type by ion implantation of the first conductive type;   forming a JTE region of a second conductive type and a plurality of depletable guard rings of the second conductive type in the semiconductor body by ion implantation of the second conductive type, wherein the JTE region is adjacent to an active region of the power semiconductor device and is spaced apart from the heavily doped channel stop region, and the depletable guard rings are formed between the JTE region and the heavily doped channel stop region; and   forming a plurality of lightly doped regions of the second conductive type in an upper portion of the JTE region and the depletable guard rings by ion implantation of the first conductive type.   
     
     
         31 . The method of manufacturing a high voltage edge termination structure for a power semiconductor device of  claim 30 , further comprising forming a plurality of field plates on the JTE region.