Mapped register access by microcontrollers

Abstract

A microcontroller can interact with external ASICs using a multi-serial peripheral interface. The ASICs and the microcontroller can be included in an electrical device or an optical-electrical device. The microcontroller can implement the interface to access the registers of the different ASICs in bulk interactions, including a bulk status request, bulk configuration setting, and bulk data reads.

What is claimed is: 
     
         1 . A method comprising:
 generating, by a microcontroller, a read request directed to an address of memory in the microcontroller, the memory including a plurality of addressees mapped using a multi-serial peripheral interface to different application-specific integrated circuits (ASICs) that are electrically connected to the microcontroller, a first portion of the plurality of addressees of the microcontroller mapped by the multi-serial peripheral interface to a first set of registers of a first ASIC, a second portion of the plurality of addressees of the microcontroller mapped by the multi-serial peripheral interface to a second set of registers of a second ASIC, the different ASICs being accessed by the microcontroller based on locations of requested addresses being in different regions mapped, by the multi-serial peripheral interface, to the different ASICs;   determining that the address of the memory from the read request is mapped by the multi-serial peripheral interface to the second portion of the memory; and   based on the address being in the second portion of the plurality of addressees in memory, reading, by the microcontroller using the multi-serial peripheral interface, register data from one or more registers of the second set of registers in the second ASIC and storing the register data at the address in the memory of the microcontroller.   
     
     
         2 . The method of  claim 1 , wherein reading, by the microcontroller, from the first portion causes first status register data to be accessed from the first set of registers of the first ASIC using the multi-serial peripheral interface, and wherein reading, by the microcontroller, from the second portion causes second status register data to be accessed from the second set of registers of the second ASIC using the multi-serial peripheral interface. 
     
     
         3 . The method of  claim 1 , wherein the multi-serial peripheral interface comprises a plurality of bidirectional data lines that read data in parallel and write data in parallel. 
     
     
         4 . The method of  claim 3 , wherein the multi-serial peripheral interface is quad-serial peripheral interface (QSPI) having four bidirectional data lines that read data in parallel and write data in parallel. 
     
     
         5 . The method of  claim 3 , wherein the multi-serial peripheral interface comprises a chip select line to sequentially select a given ASIC of the different ASICs using the plurality of bidirectional data lines in parallel on the given ASIC. 
     
     
         6 . The method of  claim 3 , wherein the plurality of bidirectional data lines read the register data from the one or more registers of the second set of registers in the second ASIC in a read direction from the second ASIC to the microcontroller, and wherein the method further comprises: writing data to another register of a third ASIC using the plurality of bidirectional data lines in parallel in a write direction that is opposite of the read direction. 
     
     
         7 . The method of  claim 1 , wherein each address in the first portion of the plurality of addressees map to different registers for different circuit components in the first ASIC. 
     
     
         8 . The method of  claim 7 , wherein the read request is a status request for operational data of an electrical circuit component in the first ASIC. 
     
     
         9 . The method of  claim 8 , wherein the electrical circuit component is a gain control for an amplifier in the first ASIC, and wherein the electrical circuit component is a monitor photodiode in the first ASIC. 
     
     
         10 . The method of  claim 1 , wherein the first ASIC and the second ASIC are electrically connected to the microcontroller by a plurality of metal contacts. 
     
     
         11 . A microcontroller device comprising:
 a first application-specific integrated circuit (ASIC) interface connectable to a first ASIC comprising a first set of registers;   a second ASIC interface connectable to a second ASIC comprising a second set of registers; and   a microcontroller that is electrically connected to the first ASIC and the second ASIC in the microcontroller device, the microcontroller configured to generate a read request directed to an address of memory in the microcontroller, the memory including a plurality of addressees mapped using a multi-serial peripheral interface to different application-specific integrated circuits that include the first ASIC and the second ASIC, a first portion of the plurality of addressees of the microcontroller mapped by the multi-serial peripheral interface to the first set of registers of a first ASIC, a second portion of the plurality of addressees of the microcontroller mapped by the multi-serial peripheral interface to the second set of registers of the second ASIC, the different ASICs being accessed by the microcontroller based on locations of requested addresses being in different regions mapped, by the multi-serial peripheral interface, to the different ASICs, wherein the microcontroller reads and stores, using the multi-serial peripheral interface, register data from one or more registers of the second set of registers in the second ASIC based on the address in the read request being in a second portion of memory.   
     
     
         12 . The microcontroller device of  claim 11 , wherein reading, by the microcontroller, from the first portion causes first status register data to be accessed from the first set of registers of the first ASIC using the multi-serial peripheral interface, and wherein reading, by the microcontroller, from the second portion causes second status register data to be accessed from the second set of registers of the second ASIC using the multi-serial peripheral interface. 
     
     
         13 . The microcontroller device of  claim 11 , wherein the multi-serial peripheral interface comprises a plurality of bidirectional data lines that read data in parallel and write data in parallel. 
     
     
         14 . The microcontroller device of  claim 13 , wherein the multi-serial peripheral interface is quad-serial peripheral interface (QSPI) having four bidirectional data lines that read data in parallel and write data in parallel. 
     
     
         15 . The microcontroller device of  claim 13 , wherein the multi-serial peripheral interface comprises a chip select line to sequentially select a given ASIC of the different ASICs using the plurality of bidirectional data lines in parallel on the given ASIC. 
     
     
         16 . The microcontroller device of  claim 13 , wherein the plurality of bidirectional data lines read the register data from the one or more registers of the second set of registers in the second ASIC in a read direction from the second ASIC to the microcontroller, and wherein the plurality of bidirectional data lines are configured to write data to another register of a third ASIC using the plurality of bidirectional data lines in parallel in a write direction that is opposite of the read direction. 
     
     
         17 . The microcontroller device of  claim 11 , wherein each address in the first portion of the plurality of addressees map to different registers for different circuit components in the first ASIC. 
     
     
         18 . The microcontroller device of  claim 17 , wherein the read request is a status request for operational data of an electrical circuit component in the first ASIC. 
     
     
         19 . The microcontroller device of  claim 18 , wherein the electrical circuit component is a gain control for an amplifier in the first ASIC, and wherein the electrical circuit component is a monitor photodiode in the first ASIC. 
     
     
         20 . The microcontroller device of  claim 11 , wherein the first ASIC and the second ASIC are electrically connected to the microcontroller by a plurality of metal contacts.