Memory management device

Abstract

Memory modules and associated devices and methods are provided using a memory copy function between a cache memory and a main memory that may be implemented in hardware. Address translation may additionally be provided.

1 . A memory module for a computing device, the memory module comprising:
 a main memory,   at least one cache memory,   a memory copy device being connected with the main memory and with the cache memory, wherein the memory copy device comprises at least one Direct Memory Access (DMA) port for accessing data in the main memory and data in the cache memory, the memory copy device further comprising a cached access module device for reading and writing data between the cache memory and the main memory via the DMA port for maintaining data integrity and coherence between the cache memory and the main memory, and   an interconnect module coupled to the DMA port, the main memory and the at least one cache memory, wherein the interconnect module is configured to present a request received from the DMA port to either a port of the main memory or a port coupled to the cache memory based on an address range of a memory address of the request.   
     
     
         2 . The memory module of  claim 1 , wherein the memory copy device further comprises:
 an address translation device for translating between a memory physical address and a memory virtual address.   
     
     
         3 . The memory module of  claim 1 , wherein the memory copy device is implemented in hardware. 
     
     
         4 . The memory module of  claim 1 , wherein the memory copy device is configured to perform the reading and writing without having to use a processor external to the memory copy device. 
     
     
         5 . A computing device comprising:
 at least one processing core module; and   a memory module comprising:   a main memory,   at least one cache memory,   a memory copy device being connected with the main memory and with the cache memory, wherein the memory copy device comprises at least one Direct Memory Access (DMA) port for accessing data in the main memory and data in the cache memory, the memory copy device further comprising a cached access module device for reading and writing data between the cache memory and the main memory via the DMA port for maintaining data integrity and coherence between the cache memory and the main memory, and   an interconnect module coupled to the DMA port, the main memory and the at least one cache memory, wherein the interconnect module is configured to present a request received from the DMA port to either a port of the main memory or a port coupled to the cache memory based on an address range of a memory address of the request,   wherein the processing core module is configured to store data in the memory module and to reads data from the memory module.   
     
     
         6 . The computing device of  claim 5  wherein the memory copy device further comprises:
 an address translation device for translating between a memory physical address and a memory virtual address. 
 
     
     
         7 . The computing device of  claim 5 , wherein the memory copy device is implemented in hardware.  8  The computing device of  claim 5 , wherein the memory copy device is configured to perform the reading and writing without having to use a processor external to the memory copy device. 
     
     
         9 . The computing device of  claim 5 , wherein the memory copy device of the memory module is configured to perform memory copy operations between the main memory and the cache memory of the memory module without using the processing core module. 
     
     
         10 . The computing device of  claim 5 , further comprising a network module to operate in a network. 
     
     
         11 . The computing device of  claim 10 , wherein the network module comprises one or more devices selected from a group consisting of a router device, a gateway device, and a Network Attached Storage (NAS) device. 
     
     
         12 . A method of operating a memory module comprising:
 translating, in a hardware device, between a memory physical address and memory virtual address; and,   in the hardware device, reading and writing data between a cache memory and a main memory via Direct Memory Access in order to maintain data integrity and coherence between the cache memory and the main memory, wherein the memory module is a memory module comprising:   a main memory,   at least one cache memory,   a memory copy device being connected with the main memory and with the cache memory, wherein the memory copy device comprises at least one Direct Memory Access (DMA) port for accessing data in the main memory and data in the cache memory, the memory copy device further comprising a cached access module device for reading and writing data between the cache memory and the main memory via the DMA port, and   an interconnect module coupled to the DMA port, the main memory and the at least one cache memory, wherein the interconnect module is configured to present a request received from the DMA port to either a port of the main memory or a port coupled to the cache memory based on an address range of a memory address of the request,   and the hardware device is the memory copy device of the memory module.   
     
     
         13 . The method of  claim 12 , wherein the reading and writing is performed at least in part using the translating.