Bias generation circuit, buffer circuit including the bias generation circuit and semiconductor system including the buffer circuit

Abstract

A bias generation circuit may include a bias generator and compensator. The bias generator may be configured to generate a bias voltage based on a reference voltage. The compensator may be configured to detect level changes of a power voltage. The compensator may be configured to control a level of the bias voltage based on detection results.

What is claimed is: 
     
         1 . A bias generation circuit comprising:
 a comparison circuit configured to compare a feedback voltage with a reference voltage and configured to output comparison results;   a voltage generation circuit configured to generate a bias voltage through a first current path and a second current path based on the output of the comparison circuit, the first current path configured to generate the feedback voltage, and the second current path formed by mirroring a current flowing through the first current path;   a voltage change tracker configured to detect a change of a power voltage; and   a bias level controller configured to control a level of the bias is voltage based on an output of the voltage change tracker.   
     
     
         2 . The bias generation circuit of  claim 1 , further comprising a low pass filter configured to remove a high-frequency component from the output of the voltage change tracker to allow a low-frequency component to pass through the low pass filter. 
     
     
         3 . The bias generation circuit of  claim 1 , wherein the comparison circuit and the voltage generation circuit are activated by a first enable signal, and
 wherein the voltage change tracker and the bias level controller are activated by a second enable signal.