Semiconductor device structures and methods of manufacturing the same

Abstract

Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a barrier layer, a third nitride semiconductor layer and a gate structure. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap greater than that of the first nitride semiconductor layer. The barrier layer is disposed on the second nitride semiconductor layer and has a bandgap greater than that of the second nitride semiconductor layer. The third nitride semiconductor layer is doped with impurity and disposed on the barrier layer. The gate structure is disposed on the third nitride semiconductor layer.

What is claimed is: 
     
         1 . A semiconductor device structure, comprising:
 a substrate;   a first nitride semiconductor layer disposed on the substrate;   a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer;   a barrier layer disposed on the second nitride semiconductor layer and having a bandgap greater than that of the second nitride semiconductor layer;   a third nitride semiconductor layer doped with impurity and disposed on the barrier layer; and   a gate structure disposed on the third nitride semiconductor layer.   
     
     
         2 . The semiconductor device structure of  claim 1 , wherein a band gap of the barrier layer is greater than a band gap of the third nitride semiconductor. 
     
     
         3 . The semiconductor device structure of  claim 1 , wherein a material of the barrier layer comprises gallium oxide, gallium oxynitride, diamond, aluminum nitride or a combination thereof. 
     
     
         4 . The semiconductor device structure of  claim 1 , wherein the barrier layer is disposed between the third nitride semiconductor layer and the second nitride semiconductor layer. 
     
     
         5 . The semiconductor device structure of  claim 1 , wherein the third nitride semiconductor layer covers a surface of the barrier layer. 
     
     
         6 . The semiconductor device structure of  claim 1 , wherein a portion of the barrier layer is exposed from the third nitride semiconductor layer. 
     
     
         7 . The semiconductor device structure of  claim 1 , wherein the third nitride semiconductor layer is separated from the second nitride semiconductor layer by the barrier layer. 
     
     
         8 . The semiconductor device structure of  claim 1 , further comprising a drain structure, and wherein the barrier layer extends from the third nitride semiconductor layer to the drain structure. 
     
     
         9 . A semiconductor device structure, comprising:
 a substrate;   a first nitride semiconductor layer disposed on the substrate;   a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer;   a third nitride semiconductor layer doped with impurity and disposed on the second nitride semiconductor layer;   a barrier layer disposed on the third nitride semiconductor and having a bandgap greater than that of the second nitride semiconductor layer; and   a gate structure in contact with the barrier layer.   
     
     
         10 . The semiconductor device structure of  claim 9 , wherein a band gap of the third nitride semiconductor layer is greater than a band gap of the barrier layer. 
     
     
         11 . The semiconductor device structure of  claim 9 , wherein a material of the third nitride semiconductor layer comprises gallium oxide, gallium oxynitride, diamond, aluminum nitride or a combination thereof. 
     
     
         12 . The semiconductor device structure of  claim 9 , wherein the third nitride semiconductor layer is disposed between the barrier layer and the gate structure. 
     
     
         13 . The semiconductor device structure of  claim 9 , wherein the third nitride semiconductor layer is covered by the gate structure. 
     
     
         14 . The semiconductor device structure of  claim 9 , wherein a portion of the third nitride semiconductor layer is exposed from the gate structure. 
     
     
         15 . The semiconductor device structure of  claim 9 , wherein the third nitride semiconductor layer surrounds the barrier layer. 
     
     
         16 . The semiconductor device structure of  claim 9 , wherein the barrier layer is separated from the gate structure by the third nitride semiconductor layer. 
     
     
         17 . The semiconductor device structure of  claim 9 , wherein the third nitride semiconductor layer covers at least one side surface of the barrier layer. 
     
     
         18 . The semiconductor device structure of  claim 9 , wherein the gate structure, the third nitride semiconductor layer and the barrier layer form a metal-insulator-semiconductor (MIS) structure. 
     
     
         19 . A method for manufacturing a semiconductor device structure, comprising:
 providing a substrate;   forming a first nitride semiconductor layer on the substrate;   forming a second nitride semiconductor layer on the first nitride semiconductor layer, wherein the second nitride semiconductor layer has a bandgap greater than that of the first nitride semiconductor layer;   forming a barrier layer on the second nitride semiconductor layer, wherein the barrier layer has a bandgap greater than that of the second nitride semiconductor layer;   forming a fourth nitride semiconductor layer doped with impurity on the barrier layer; and   forming a gate structure on the fourth nitride semiconductor layer.   
     
     
         20 . The method of  claim 19 , wherein the barrier layer is formed by a thermal growth.