Efficient data encoding

Abstract

Circuits, methods, and apparatus for efficiently implementing encoding and decoding between binary and multilevel data.

What is claimed is: 
     
         1 . A method of encoding binary data, the method comprising:
 receiving a first number of bits including first branch bits and second branch bits;   determining if the first branch bits have a value in a first set of values, and if they do, then   encoding the first branch bits into a first symbol in a second number of symbols;   encoding the remaining bits in the first number bits into the remaining symbols in the second number of symbols; and if the first branch bits do not have a value in the first set of values, then   assigning an address value to two or more symbols in the second number of symbols; and   not encoding the first branch bits; and   encoding the remaining bits into the remaining symbols in the second number of symbols.   
     
     
         2 . The method of  claim 1  wherein the symbols are three-level symbols. 
     
     
         3 . The method of  claim 2  wherein the first number of bits comprises 11 bits, the first branch bits comprises 2 bits, and the second branch bits comprises three bits. 
     
     
         4 . The method of  claim 3  wherein the second number of symbols is 7 symbols. 
     
     
         5 . The method of  claim 4  wherein the address value is assigned to symbols based on the value of the second branch bits. 
     
     
         6 . The method of  claim 5  wherein the second branch bits are encoded as a first symbol and the address value is assigned to one of the three pairs of subsequent symbols. 
     
     
         7 . The method of  claim 6  wherein groups of three bits are encoded into pairs of symbols, such that 8 of 9 possible combinations for the two symbols are used, and the unused combination is the address value. 
     
     
         8 . A method of decoding symbol data, the method comprising:
 receiving a second number of symbols, the symbols comprising a first symbol and a plurality of symbol pairs;   determining if any of the plurality of symbol pairs has an address value, and if it does then   setting first branch bits to a specific value;   decoding the first symbol to second branch bits;   decoding the remaining symbol pairs to a plurality of bits; and if none of the symbol pairs has the address value, then   decoding the first symbol to the first branch bits; and   decoding the remaining symbol pairs to a plurality of bits.   
     
     
         9 . The method of  claim 8  wherein the symbols are three-level symbols. 
     
     
         10 . The method of  claim 9  wherein the first number of bits comprises 11 bits, the first branch bits comprises 2 bits, and the second branch bits comprises three bits. 
     
     
         11 . The method of  claim 10  wherein the second number of symbols is 7 symbols. 
     
     
         12 . The method of  claim 11  wherein the symbols are decoded based on the position of the address value. 
     
     
         13 . The method of  claim 12  wherein before decoding, groups of three bits are encoded into pairs of symbols, such that 8 of 9 possible combinations for the two symbols are used, and the unused combination is the address value.