US2022414046A1PendingUtilityA1

Systems, methods, and devices for dynamic high speed lane direction switching for asymmetrical interfaces

Assignee: INTEL CORPPriority: Jun 25, 2018Filed: Aug 26, 2022Published: Dec 29, 2022
Est. expiryJun 25, 2038(~11.9 yrs left)· nominal 20-yr term from priority
G06F 2213/0026G06F 13/4282G06F 2213/0042G06F 13/4063
63
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Claims

Abstract

Systems, devices, computer program products, and methods include determining by a connection manager that a connected device can be enhanced by an asymmetrical multi-lane link. The connection manager can use system parameters, including bandwidth information, to switch a direction of one or more lanes of the multi-lane link. The connection manager can use register setting instructions to change register settings on the host side and on the device side to switch the direction of one or more lanes of the multi-lane link.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus for configuring a multi-lane link, the apparatus comprising:
 one or more ports comprising hardware to support the multi-lane link, wherein the multi-lane link comprises a first set of lanes configured in a first direction and a second set of lanes configured in a second direction, the second direction is opposite to the first direction; and   link configuration logic, implemented at least in part in hardware circuitry, to switch a direction of a subset of lanes from the first direction to the second direction to form a reduced first set of lanes in the first direction and an expanded second set of lanes in the second direction, wherein the reduced first set of lanes comprises at least two lanes,   wherein the one or more ports are to use the reduced first set of lanes in the first direction and the expanded second set of lanes in the second direction.   
     
     
         2 . The apparatus of  claim 1 , wherein the one or more ports comprise one or both of a Peripheral Component Interconnect Express (PCIe)-based port or a hot-plug-based port. 
     
     
         3 . The apparatus of  claim 2 , wherein the one or more ports comprise one or both of a converged input/output (CIO) or universal serial bus (USB)-based port. 
     
     
         4 . The apparatus of  claim 1 , wherein the first set of lanes configured in the first direction comprises a set of downstream lanes, the set of downstream lanes configured to direct data from the apparatus to a downstream connected device, and the second set of lanes configured in the second direction comprises a set of upstream lanes, the set of upstream lanes configured to direct data to the apparatus from the downstream connected device. 
     
     
         5 . The apparatus of  claim 4 , wherein the link configuration logic is to:
 determine that the downstream connected device uses more downstream bandwidth than upstream bandwidth;   determine that the device can support a switching of a subset of upstream lanes to a subset of downstream lanes; and   cause the downstream connected device to switch the subset of upstream lanes to the subset of downstream lanes; and   the apparatus to transmit data on the switched subset of downstream lanes.   
     
     
         6 . The apparatus of  claim 4 , wherein the link configuration logic is to:
 determine that the device uses more upstream bandwidth than downstream bandwidth;   determine that the device can support a switching of a subset of downstream lanes to a subset of upstream lanes; and   cause the downstream connected device to switch the subset of downstream lanes to the subset of upstream lanes; and   the apparatus to receive data on the switched subset of upstream lanes.   
     
     
         7 . The apparatus of  claim 1 , the link configuration logic to cause an ordered set to switch the direction of the subset of lanes, the ordered set transmitted across the first set of lanes. 
     
     
         8 . The apparatus of  claim 1 , the link configuration logic to perform a register access of a register associated with the one or more ports that control a polarity of one or more lanes coupled to the one or more ports; and
 write a register value to the register to reverse the polarity of the subset of lanes.   
     
     
         9 . The apparatus of  claim 1 , wherein the link configuration logic is to determine a data directional bias based on a type of a device connected to the multi-lane link. 
     
     
         10 . A system comprising:
 a host comprising a data processor and a system manager; and   a device connected to the host across a multi-lane link, the multi-lane link comprising a first set of lanes configured to direct data in a first direction and a second set of lanes configured to direct data in a second direction opposite the first direction;   wherein the system manager is to:
 cause the host device to switch one or more lanes from the first direction to the second direction; and 
 cause the host device to use the switched lanes with the second set of lanes to direct data in the second direction and to use a remaining plurality of lanes in the first set of lanes to direct data in the first direction. 
   
     
     
         11 . The system of  claim 10 , wherein the first set of lanes configured in the first direction comprises a set of downstream lanes, the set of downstream lanes configured to direct data from the host to a downstream connected device, and the second set of lanes configured in the second direction comprises a set of upstream lanes, the set of upstream lanes configured to direct data to the host from the downstream connected device. 
     
     
         12 . The system of  claim 11 , wherein the system manager is to:
 determine that the downstream connected device uses more downstream bandwidth than upstream bandwidth;   determine that the device can support a switching of subset of upstream lanes to subset of downstream lanes; and   cause the downstream connected device to switch subset of upstream lanes to subset of downstream lanes; and   the host device to transmit data on the switched subset of downstream lanes.   
     
     
         13 . The system of  claim 12 , wherein the device comprises one of a hot-plug compatible monitor, hot-plug compatible projector, hot-plug compatible audio device, hot-plug capable docking station, or hot-plug compatible data storage device. 
     
     
         14 . The system of  claim 10 , the system manager to cause an ordered set to switch the direction of the one or more lanes, the ordered set transmitted across the first set of lanes. 
     
     
         15 . The system of  claim 11 , wherein the system manager is to:
 determine that the device uses more upstream bandwidth than downstream bandwidth;   determine that the device can support a switching of subset of downstream lanes to subset of upstream lanes; and   cause the downstream connected device to switch subset of downstream lanes to subset of upstream lanes; and   the host device to receive data on the switched subset of upstream lanes.   
     
     
         16 . The system of  claim 15 , wherein the device comprises one of a hot-plug compatible camera. 
     
     
         17 . A method comprising:
 operating, by a host, a multi-lane link between a host device and a device, wherein the multi-lane link comprises a first set of lanes configured in a first direction and a second set of lanes configured in a second direction, the second direction is opposite to the first direction;   switching, by the host, a direction of a subset of lanes from the first direction to the second direction to form a reduced first set of lanes in the first direction and an expanded second set of lanes in the second direction, wherein the reduced first set of lanes comprises at least two lanes; and   operating, by the host, the reduced first set of lanes in the first direction and the expanded second set of lanes in the second direction.   
     
     
         18 . The method of  claim 17 , wherein the multi-lane link comprises one or both of a Peripheral Component Interconnect Express (PCIe)-based link or a hot-plug-based link. 
     
     
         19 . The method of  claim 18 , wherein the multi-lane link comprises one or both of a converged input/output (CIO) link or universal serial bus (USB)-based link. 
     
     
         20 . The method of  claim 17 , wherein the first set of lanes configured in the first direction comprises a set of downstream lanes, the set of downstream lanes configured to direct data from the host to the device, and the second set of lanes configured in the second direction comprises a set of upstream lanes, the set of upstream lanes configured to direct data to the host from the device. 
     
     
         21 . The method of  claim 20 , further comprising:
 determining, by the host, that the device uses more downstream bandwidth than upstream bandwidth;   determining, by the host, that the device can support a switching of a subset of upstream lanes to a subset of downstream lanes; and   causing the device to switch the subset of upstream lanes to the subset of downstream lanes; and   transmitting, by the device, data on the switched subset of downstream lanes.   
     
     
         22 . The method of  claim 20 , further comprising:
 determining, by the host, that the device uses more upstream bandwidth than downstream bandwidth;   determining, by the host, that the device can support a switching of a subset of downstream lanes to a subset of upstream lanes; and   causing the device to switch the subset of downstream lanes to the subset of upstream lanes; and   receiving, by the host, data on the switched subset of upstream lanes.   
     
     
         23 . The method of  claim 17 , further comprising transmitting an ordered set across the first set of lanes to switch the direction of the subset of lanes. 
     
     
         24 . The method of  claim 17 , further comprising:
 performing, by the host, a register access of a register associated with the multi-lane link that control a polarity of one or more lanes of the multi-lane link; and   writing, by the host, a register value to the register to reverse the polarity of the subset of lanes.   
     
     
         25 . The method of  claim 17 , further comprising determining, by the host, a data directional bias based on a type of a device connected to the multi-lane link.

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