Packet duplication

Abstract

An apparatus is provided in a communications device. The apparatus comprises at least one processor and at least one memory including computer code for one or more programs. The at least one memory and the computer code are configured, with the at least one processor, to cause the apparatus to determine that at least one of a plurality of logical channels configured for packet duplication is to be deactivated; and determine an allocation of one or more cells associated with the at least one deactivated logical channel to one or more active logical channels of said plurality of logical channels configured for packet duplication.

1 . An apparatus comprising:
 at least one processor; and   at least one memory including computer code for one or more programs, the at least one memory and the computer code configured, with the at least one processor, to cause the apparatus at least to:
 determine that at least one of a plurality of logical channels configured for packet duplication is to be deactivated; and 
 determine an allocation of one or more cells associated with the at least one deactivated logical channel to one or more active logical channels of said plurality of logical channels configured for packet duplication. 
   
     
     
         2 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 determine the allocation using one or more preconfigured rules.   
     
     
         3 . The apparatus as claimed in  claim 2 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 receive the one or more preconfigured rules from a base station.   
     
     
         4 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to a primary logical channel of the plurality of logical channels configured for packet duplication.   
     
     
         5 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to one or more active logical channels in dependence on a logical channel index of at least one of said plurality of logical channels configured for packet duplication.   
     
     
         6 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to:
 an active logical channel with a highest logical channel index; 
 an active logical channel with a lowest logical channel index; 
 an active logical channel with a next highest logical channel index to that of the deactivated logical channel; or 
 an active logical channel with a next lowest logical channel index to that of the deactivated logical channel. 
   
     
     
         7 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to one or more active logical channels in dependence on activity associated with one or more active logical channels of said plurality of logical channels configured for packet duplication.   
     
     
         8 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to:
 an active logical channel associated with a most queued buffer; 
 an active logical channel associated with a least queued buffer; 
 an active logical channel associated with a highest sequence number of a packet; or 
 an active logical channel associated with a lowest sequence number of a packet. 
   
     
     
         9 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to one or more active logical channels in dependence on a predefined mapping between said logical channels.   
     
     
         10 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to one or more active logical channels in dependence on a number of cells associated with one or more active logical channels of said plurality of logical channels configured for packet duplication, such that the one or more cells associated with the deactivated logical channel are allocated to:
 an active logical channel associated with highest number of allowed cells; or 
 an active logical channel associated with a lowest number of allowed cells. 
   
     
     
         11 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to one or more active logical channels in dependence on a number of carriers in a given band associated with the one or more active logical channels of said plurality of logical channels configured for packet duplication such that the one or more cells associated with the deactivated logical channel are allocated to:
 an active logical channel associated with most number of carriers; or 
 an active logical channel associated with a lowest number of carriers. 
   
     
     
         12 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to one or more active logical channels in dependence of one or more of the following:
 the logical channel priority; 
 the prioritized bit rate; and 
 the channel access priority class. 
   
     
     
         13 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 allocate the one or more cells associated with the deactivated logical channel to an active logical channel associated with a same cell group as the deactivated logical channel.   
     
     
         14 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 receive information indicating that one or more of the deactivated logical channels is to be activated and reallocating the one or more cells previously associated with that respective logical channel to that respective logical channel.   
     
     
         15 . The apparatus as claimed in  claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to:
 receive information indicating that at least one of a plurality of logical channels configured for packet duplication is to be deactivated and in response thereto determine that the respective logical channel is to be deactivated.   
     
     
         16 . The apparatus as claimed in  claim 1 , wherein a plurality of logical channels remains active for the packet duplication after deactivation of the at least one of a plurality of logical channels configured for packet duplication. 
     
     
         17 . The apparatus as claimed in  claim 1 , wherein the packet duplication comprises a dual connectivity-based packet duplication and a carrier aggregation-based packet duplication in each of the at least two cell groups of the dual connectivity-based packet duplication. 
     
     
         18 . The apparatus as claimed in  claim 1 , wherein a carrier aggregation-based packet duplication is supported by a single medium access control entity. 
     
     
         19 . A method performed by an apparatus provided in a communications device, said method comprising:
 determining that at least one of a plurality of logical channels configured for packet duplication is to be deactivated; and   determining an allocation of one or more cells associated with the at least one deactivated logical channel to one or more active logical channels of said plurality of logical channels configured for packet duplication.   
     
     
         20 . A non-transitory computer readable medium comprising program instructions stored thereon which when run on at least one processor cause an apparatus at least to:
 determine that at least one of a plurality of logical channels configured for packet duplication is to be deactivated; and   determine an allocation of one or more cells associated with the at least one deactivated logical channel to one or more active logical channels of said plurality of logical channels configured for packet duplication.