Systems and methods for detecting currents of power management systems

Abstract

System and method for detecting one or more currents. For example, a system for detecting one or more currents includes: one or more current sampling units coupled to one or more terminal transistors respectively and configured to sample one or more terminal currents that flow between a system terminal of a power management system and one or more port terminals through the one or more terminal transistors respectively; one or more operational amplifiers coupled to the one or more current sampling units respectively and configured to generate one or more detection currents respectively, the one or more detection currents representing one or more magnitudes of the one or more terminal currents respectively; and a signal combiner configured to receive the one or more detection currents, generate a combined detection voltage representing a sum of the one or more magnitudes of the one or more terminal currents.

What is claimed is: 
     
         1 . A system for detecting one or more currents, the system comprising:
 one or more current sampling units coupled to one or more terminal transistors respectively and configured to sample one or more terminal currents that flow between a system terminal of a power management system and one or more port terminals through the one or more terminal transistors respectively;   one or more operational amplifiers coupled to the one or more current sampling units respectively and configured to generate one or more detection currents respectively, the one or more detection currents representing one or more magnitudes of the one or more terminal currents respectively; and   a signal combiner configured to receive the one or more detection currents, generate a combined detection voltage representing a sum of the one or more magnitudes of the one or more terminal currents, and output the combined detection voltage to the power management system to regulate the sum of the one or more magnitudes of the one or more terminal currents.   
     
     
         2 . The system of  claim 1  wherein:
 the one or more current sampling units include a first sampling unit; 
 the one or more terminal transistors include a first terminal transistor; 
 the one or more terminal currents include a first terminal current; 
 the one or more port terminals include a first port terminal; 
 the one or more operational amplifiers include a first operational amplifier; 
 the one or more detection currents include a first detection current; and 
 the one or more magnitudes of the one or more terminal currents include a first magnitude of the first terminal current. 
 
     
     
         3 . The system of  claim 2  wherein:
 the first current sampling unit is coupled to the first terminal transistor and configured to sample the first terminal current that flows between the system terminal of the power management system and the first port terminal through the first terminal transistor; and 
 the first operational amplifier is coupled to the first current sampling unit and configured to generate the first detection current, the first detection current representing the first magnitude of the first terminal current. 
 
     
     
         4 . The system of  claim 3  wherein:
 the one or more current sampling units include a second sampling unit; 
 the one or more terminal transistors include a second terminal transistor; 
 the one or more terminal currents include a second terminal current; 
 the one or more port terminals include a second port terminal; 
 the one or more operational amplifiers include a second operational amplifier; 
 the one or more detection currents include a second detection current; and 
 the one or more magnitudes of the one or more terminal currents include a second magnitude of the second terminal current. 
 
     
     
         5 . The system of  claim 4  wherein:
 the second current sampling unit is coupled to the second terminal transistor and configured to sample the second terminal current that flows between the system terminal of the power management system and the second port terminal through the second terminal transistor; and 
 the second operational amplifier is coupled to the second current sampling unit and configured to generate the second detection current, the second detection current representing the second magnitude of the second terminal current. 
 
     
     
         6 . The system of  claim 5  wherein the signal combiner is further configured to receive at least the first detection current and the second detection current, generate the combined detection voltage representing the sum of at least the first magnitude of the first terminal current and the second magnitude of the second terminal current, and output the combined detection voltage to the power management system to regulate the sum of at least the first magnitude of the first terminal current and the second magnitude of the second terminal current. 
     
     
         7 . The system of  claim 3  wherein:
 the first terminal transistor includes a first transistor terminal, a second transistor terminal, and a third transistor terminal; 
 wherein:
 the second transistor terminal is connected to the system terminal of the power management system; and 
 the third transistor terminal is connected to the first port terminal. 
 
 
     
     
         8 . The system of  claim 7  wherein:
 the first sampling unit includes a first sampling transistor and a second sampling transistor; 
 wherein:
 the first sampling transistor includes a fourth transistor terminal, a fifth transistor terminal, and a sixth transistor terminal; and 
 the second sampling transistor includes a seventh transistor terminal, an eighth transistor terminal, and a ninth transistor terminal. 
 
 
     
     
         9 . The system of  claim 8  wherein:
 the fourth transistor terminal and the seventh transistor terminal each are connected to the first transistor terminal; 
 the fifth transistor terminal is connected to the third transistor terminal; and 
 the eighth transistor terminal is connected to the second transistor terminal. 
 
     
     
         10 . The system of  claim 8  wherein:
 the first operational amplifier includes a first amplifier terminal, a second amplifier terminal, and a third amplifier terminal; 
 wherein:
 the first amplifier terminal is connected to the sixth transistor terminal of the first sampling transistor; and 
 the second amplifier terminal is connected to the ninth transistor terminal of the second sampling transistor. 
 
 
     
     
         11 . The system of  claim 10  wherein the first operational amplifier is further configured to generate the first detection current at the third amplifier terminal. 
     
     
         12 . The system of  claim 10  wherein the first operational amplifier further includes:
 a chopper amplifier; 
 a current mirror coupled to the chopper amplifier; and 
 a digital-to-analog converter coupled to the current mirror. 
 
     
     
         13 . The system of  claim 12  wherein the current minor of the first operational amplifier is configured to output the first detection current. 
     
     
         14 . A chopper amplifier comprising:
 a ground voltage generator configured to receive a first ground voltage and a system voltage and generate a second ground voltage based at least in part on the first ground voltage and the system voltage;   a clock signal generator configured to receive an input clock signal, the first ground voltage and the second ground voltage and generate a first clock signal and a second clock signal based at least in part on the input clock signal, the first ground voltage and the second ground voltage; and   a chopper and amplification unit including a first chopper unit, a second chopper unit coupled to the first chopper unit through multiple transistors, and a third chopper unit coupled to the second chopper unit through multiple transistors;   wherein:
 the second ground voltage is higher than or equal to the first ground voltage; 
   wherein:
 if the first clock signal is equal to the first ground voltage, the first clock signal is at a logic low level; and 
 if the second clock signal is equal to the second ground voltage, the second clock signal is at the logic low level; 
   wherein:
 the first chopper unit is configured to receive the second clock signal; 
 the second chopper unit is configured to receive the second clock signal; and 
 the third chopper unit is configured to receive the first clock signal. 
   
     
     
         15 . The chopper amplifier of  claim 14  wherein a clock signal generator includes:
 a first voltage converter configured to, with one or more other components, convert the input clock signal to the second clock signal; and 
 a second voltage converter configured to, with one or more other components, convert the second clock signal to the first clock signal. 
 
     
     
         16 . The chopper amplifier of  claim 14  wherein the ground voltage generator is further configured to:
 if the system voltage is larger than a predetermined threshold, generate the second ground voltage to be equal to the system voltage minus a predetermined magnitude; and 
 if the system voltage is smaller than the predetermined threshold, generate the second ground voltage to be equal to the first ground voltage. 
 
     
     
         17 . A method for detecting one or more currents, the method comprising:
 sampling one or more terminal currents that flow between a system terminal of a power management system and one or more port terminals through one or more terminal transistors respectively;   generating one or more detection currents representing one or more magnitudes of the one or more terminal currents respectively;   receiving the one or more detection currents;   generating a combined detection voltage representing a sum of the one or more magnitudes of the one or more terminal currents; and   outputting the combined detection voltage to the power management system to regulate the sum of the one or more magnitudes of the one or more terminal currents.   
     
     
         18 . The method of  claim 17  wherein:
 the one or more terminal transistors include a first terminal transistor; 
 the one or more terminal currents include a first terminal current; 
 the one or more port terminals include a first port terminal; 
 the one or more detection currents include a first detection current; and 
 the one or more magnitudes of the one or more terminal currents include a first magnitude of the first terminal current. 
 
     
     
         19 . The method of  claim 18  wherein:
 the sampling one or more terminal currents that flow between a system terminal of a power management system and one or more port terminals through one or more terminal transistors respectively includes sampling the first terminal current that flows between the system terminal of the power management system and the first port terminal through the first terminal transistor; and 
 the generating one or more detection currents representing one or more magnitudes of the one or more terminal currents respectively includes generating the first detection current representing the first magnitude of the first terminal current. 
 
     
     
         20 . The method of  claim 19  wherein:
 the receiving the one or more detection currents includes receiving at least the first detection current; and 
 the generating a combined detection voltage representing a sum of the one or more magnitudes of the one or more terminal currents includes generating the combined detection voltage representing the sum of at least the first magnitude of the first terminal current. 
 
     
     
         21 . The method of  claim 20  wherein the sum of the one or more magnitudes of the one or more terminal currents is equal to the first magnitude of the first terminal current.