US2023126598A1PendingUtilityA1

Attachment of Stress Sensitive Integrated Circuit Dies

Assignee: SCIOSENSE BVPriority: Nov 17, 2017Filed: Dec 12, 2022Published: Apr 27, 2023
Est. expiryNov 17, 2037(~11.3 yrs left)· nominal 20-yr term from priority
B81B 2203/0127B81B 2207/012G01L 9/0073B81B 2201/0257G01L 9/0048B81B 7/0074B81B 7/0048B81B 2207/015B81B 7/02H04R 1/04G01L 19/0654B81B 2201/0264H04R 19/04H04R 2201/003
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Claims

Abstract

In an embodiment, a semiconductor package includes a support and a stack of two or more semiconductor dies, the stack including an upper die and further including a lower die attached to the support by adhesive on a backside of the lower die, wherein the adhesive covers only part of the backside of the lower die, and wherein the adhesive has a plurality of non-contiguous regions on the backside of the lower die.

Claims

exact text as granted — not AI-modified
1 . A semiconductor package comprising:
 a support; and   a stack of two or more semiconductor dies, the stack including an upper die and further including a lower die attached to the support by adhesive on a backside of the lower die,   wherein the adhesive covers only part of the backside of the lower die, and   wherein the adhesive has a plurality of non-contiguous regions on the backside of the lower die.   
     
     
         2 . The package of  claim 1 , wherein the upper die includes a capacitive pressure sensor, and wherein the lower die includes a CMOS read-out circuit. 
     
     
         3 . A semiconductor package comprising:
 a support; and   a stack of two or more semiconductor dies, the stack including a lower die attached to the support and further including an upper die attached to the lower die by adhesive on a backside of the upper die,   wherein the adhesive covers only part of the backside of the upper die, and   wherein the adhesive has a plurality of non-contiguous regions on the backside of the upper die.   
     
     
         4 . The package of  claim 3 , wherein the upper die includes a capacitive pressure sensor, and wherein the lower die includes a CMOS read-out circuit. 
     
     
         5 . A semiconductor package comprising:
 a support; and   a die attached to the support by adhesive on a backside of the die,   wherein the adhesive covers only part of the backside of the die, the adhesive having two or a plurality of non-contiguous stripe-shaped regions on the backside of the die.   
     
     
         6 . The package of  claim 5 , wherein the stripe-shaped regions of the adhesive are disposed adjacent edges of the die. 
     
     
         7 . The package of  claim 6 , wherein the die includes a capacitive pressure sensor having a rectangular, suspended tensile membrane, and wherein the stripe-shaped regions of adhesive are oriented parallel to longer sides of the membrane. 
     
     
         8 . The package of  claim 5 , wherein the die has a maximum thickness no greater than 250 µm. 
     
     
         9 . The package of  claim 5 , wherein the package has a maximum height no greater than 0.8 mm. 
     
     
         10 . The package of  claim 5 , further comprising an air channel in the adhesive, the air channel configured to allow out diffusion of water vapor. 
     
     
         11 . The package of  claim 5 , wherein the adhesive includes a plurality of non-contiguous regions on the backside of the die at its corners. 
     
     
         12 . The package of  claim 5 , wherein the support includes a die pad, and wherein the die is attached by the adhesive to the die pad.

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