Printed circuit board comprising a plurality of power transistor switching cells in parallel

Abstract

A printed circuit board comprises N power switching cells operating in parallel and respectively comprising a transistor leg, at least one decoupling capacitor and a gate driver circuit. Each transistor leg comprises respective first and second transistors in series, a drain of the first transistor being connected to a positive DC line, a source of the second transistor being connected to a negative DC line, a source of the first transistor being connected to a drain of the second through a connection middle-point connected to an output terminal. Each gate driver circuit controls respective switching ON and OFF of the corresponding first and second transistors. The N transistor legs of the corresponding N power switching cells are positioned to substantially form a convex polygon having N edges of substantially the same length, each one of the N transistor legs being positioned along one of the edges of the convex polygon.

What is claimed is: 
     
         1 . A printed circuit board comprising:
 a pair of input terminals consisting of a positive direct current (DC) terminal and a negative DC terminal;   an output terminal; and   N power switching cells, N being an integer greater than two, the N power switching cells operating in parallel, each power switching cell comprising:
 a transistor leg comprising a first transistor and a second transistor connected in series, a drain of the first transistor being connected to the positive DC terminal, a source of the second transistor being connected to the negative DC terminal, a source of the first transistor being connected to a drain of the second transistor via an electrical line comprising a connection middle-point, the connection middle-point being connected to the output terminal; and 
 a gate driver circuit comprising a first gate driver electrically connected to a gate of the first transistor and a second gate driver electrically connected to a gate of the second transistor for controlling respective switching ON and OFF of the first and second transistors; and 
   wherein the N transistor legs of the corresponding N power switching cells are positioned on the printed circuit board to substantially form a convex polygon having N edges of substantially the same length, each one of the N transistor legs of the corresponding N power switching cells being positioned along one of the edges of the convex polygon.   
     
     
         2 . The printed circuit board of  claim 1 , wherein the output terminal is positioned substantially at the center of the convex polygon formed by the N transistor legs of the corresponding N power switching cells. 
     
     
         3 . The printed circuit board of  claim 1 , further comprising a positive DC line and a negative DC line, the positive DC line connecting the positive DC terminal to the drain of the first transistor, the negative DC line connecting the negative DC terminal to the source of the second transistor, the positive and negative DC lines being positioned on the printed circuit board to encircle the N transistor legs of the corresponding N power switching cells. 
     
     
         4 . The printed circuit board of  claim 1 , further comprising a positive DC line and a negative DC line, the positive DC line connecting the positive DC terminal to the drain of the first transistor, the negative DC line connecting the negative DC terminal to the source of the second transistor, one of the positive or negative DC lines being stacked above the other one to form a laminated DC bus. 
     
     
         5 . The printed circuit board of  claim 1 , wherein a fiberglass insulator is positioned at the center of the printed circuit board, the output terminal being supported by the fiberglass insulator. 
     
     
         6 . The printed circuit board of  claim 1 , comprising a plurality of mounting holes evenly distributed on the printed circuit board, the mounting holes receiving screws for securing the printed circuit board to a heatsink located below the printed circuit board. 
     
     
         7 . The printed circuit board of  claim 1 , wherein the first and second transistors consist of power transistors. 
     
     
         8 . The printed circuit board of  claim 7 , wherein the first and second power transistors consist of Insulated Gate Bipolar Transistor (IGBT) transistors, Silicon Metal-Oxide-Semiconductor (SiMOS) transistors, Silicon Carbide Metal-Oxide-Semiconductor (SiCMOS) transistors or Gallium Nitride (GaN) transistors. 
     
     
         9 . The printed circuit board of  claim 1 , wherein the N gate driver circuits synchronously switch ON the N first transistors and switch OFF the N second transistors. 
     
     
         10 . The printed circuit board of  claim 1 , wherein the N gate driver circuits synchronously switch OFF the N first transistors and switch ON the N second transistors. 
     
     
         11 . The printed circuit board of  claim 1 , wherein each power switching cell further comprises at least one decoupling capacitor in parallel with the transistor leg of the power switching cell. 
     
     
         12 . The printed circuit board of  claim 11 , wherein the at least one decoupling capacitor of the N power switching cells are evenly distributed on the printed circuit board. 
     
     
         13 . The printed circuit board of  claim 11 , wherein the at least one decoupling capacitor consists of a high frequency capacitor. 
     
     
         14 . The printed circuit board of  claim 1 , wherein the N gate driver circuits are connected to a controller generating an electrical control signal for synchronizing the N first and second transistors, the electrical control signal being amplified by the N gate driver circuits. 
     
     
         15 . The printed circuit board of  claim 1 , wherein the N gate driver circuits are positioned on the printed circuit board in a same layer as the N transistor legs. 
     
     
         16 . The printed circuit board of  claim 1 , wherein the N gate driver circuits are positioned on the printed circuit board above a layer comprising the N transistor legs. 
     
     
         17 . The printed circuit board of  claim 1 , wherein N is equal to 3 and the  3  transistor legs are positioned on the printed circuit board to substantially form an equilateral triangle. 
     
     
         18 . The printed circuit board of  claim 1 , wherein N is equal to 5 and the  5  transistor legs are positioned on the printed circuit board to substantially form a convex pentagon, the five edges of the pentagon having the same size. 
     
     
         19 . The printed circuit board of  claim 1 , wherein the output terminal is connected to an inductive load. 
     
     
         20 . The printed circuit board of  claim 1 , wherein the input terminals are connected to a DC power source providing a high voltage direct current of at least 100 volts.