Semiconductor device with stacked terminals

Abstract

A semiconductor device includes: a housing; a substrate inside the housing; first and second semiconductor circuits on the substrate; and first and second planar terminals electrically connected to the first and second semiconductor circuits, respectively, the first and second planar terminals stacked on top of each other, wherein each of the first and second planar terminals extends away from the housing.

What is claimed is: 
     
         1 . An apparatus comprising:
 a plurality of semiconductor devices each comprising a substrate, first and second semiconductor circuits on the substrate, and first and second busbars abutting the first and second semiconductor circuits, respectively;   a capacitor; and   first and second planar terminals electrically connected to the capacitor, the first and second planar terminals stacked on top of each other, wherein the first planar terminal abuts the first busbar of each of the plurality of semiconductor devices, and wherein the second planar terminal abuts the second busbar of each of the plurality of semiconductor devices.   
     
     
         2 . The apparatus of  claim 1 , further comprising a plurality of capacitors, wherein the first and second planar terminals are electrically connected to each of the plurality of capacitors. 
     
     
         3 . The apparatus of  claim 1 , wherein each of the first and second planar terminals comprises a respective sheet that extends between the capacitor and the plurality of semiconductor devices. 
     
     
         4 . The apparatus of  claim 3 , wherein at least one of the sheets has a step shape to provide a first contact plane on a far side of the capacitor. 
     
     
         5 . The apparatus of  claim 4 , wherein the other of the sheets also has a step shape to provide a second contact plane on a near side of the capacitor. 
     
     
         6 . The apparatus of  claim 1 , wherein each of the first planar terminal and the second planar terminal is a single piece conductive sheet. 
     
     
         7 . The apparatus of  claim 1 , wherein at least a portion of the second planar terminal overlays on top of the at least a portion of the first planar terminal with only an electrical insulation layer directly between the portion of the first planar terminal and the portion of the second planar terminal, and wherein the portion of the second planar terminal and the portion of the first planar terminal are uncovered with laminate material. 
     
     
         8 . The apparatus of  claim 1 , wherein at least a portion of the first planar terminal and at least a portion of the second planar terminal are stacked in a direction that is normal to the substrate such that the first planar terminal overlays on top of the second planar terminal before a turn associated with a step shape of both the first planar terminal and the second planar terminal. 
     
     
         9 . The apparatus of  claim 8 , wherein at least a portion of the first planar terminal and at least a portion of the second planar terminal are stacked in a direction that is parallel to the substrate such that the first planar terminal overlays the second planar terminal after the turn associated with the step shape of both the first planar terminal and the second planar terminal. 
     
     
         10 . The apparatus of  claim 8 , wherein the first planar terminal overlays the second planar terminal throughout the turn associated with the step shape. 
     
     
         11 . A method comprising:
 positioning semiconductor devices in a row, each of the semiconductor devices comprising a substrate, first and second semiconductor circuits on the substrate, and first and second busbars abutting the first and second semiconductor circuits, respectively;   forming an assembly by placing a first planar terminal in contact with the first busbar of each of the plurality of semiconductor devices, and a second planar terminal in contact with the second busbar of each of the plurality of semiconductor devices, the first and second planar terminals stacked on top of each other;   connecting the first planar terminal to the first busbar of each of the plurality of semiconductor devices, the connecting performed from one side of the assembly; and   connecting the second planar terminal to the second busbar of each of the plurality of semiconductor devices, the connecting performed from an opposite side of the assembly.   
     
     
         12 . The method of  claim 11 , further comprising including an electrical insulation layer between the first and second planar terminals. 
     
     
         13 . The method of  claim 11 , further comprising electrically connecting each of the first and second planar terminals to a plurality of capacitors. 
     
     
         14 . The method of  claim 11 , wherein the connecting comprises welding. 
     
     
         15 . The method of  claim 12 , wherein at least a portion of the first planar terminal and a portion of the second planar terminal are uncovered with laminate material. 
     
     
         16 . The method of  claim 11 , wherein each of the first planar terminal and the second planar terminal is a single piece conductive sheet. 
     
     
         17 . The method of  claim 11 , additionally comprising placing the substrate in a housing. 
     
     
         18 . The method of  claim 17 , wherein the first busbar is located entirely within the housing and the second busbar is partially located within the housing. 
     
     
         19 . The method of  claim 18 , wherein a first portion of the first planar terminal that is electrically connected to the first busbar and a second portion of the first planar terminal extending away from the housing are both part of a single piece conductive sheet. 
     
     
         20 . The method of  claim 19 , additionally comprising stacking at least the second portion of the first planar terminal and at least a portion of the second planar terminal in a direction that is normal to the substrate such that the first planar terminal overlays on top of the second planar terminal.