On-chip heater temperature calibration

Abstract

Systems, methods, and circuitries are provided for calibrating a heater used to heat an adjustable resistance network during a trimming procedure. In one example, a circuit is provided that includes an adjustable resistance network including first resistance segments; a heater element thermally coupled to the adjustable resistance network; a calibration resistor including second resistance segments thermally coupled to the first resistance segments; and interface circuitry coupled to the calibration resistor.

What is claimed is: 
     
         1 . A system, comprising:
 an adjustable resistance network;   a calibration resistor thermally coupled to the adjustable resistance network;   interface circuitry coupled to the calibration resistor;   a heater thermally coupled to the adjustable resistance network; and   a processor coupled to the heater and to the interface circuit, wherein the processor is configured to:
 retrieve a calibration value from non-volatile memory; 
 provide a power supply control signal to initiate a power pulse to the heater; 
 measure a resistance of the calibration resistor using the interface circuitry; 
 adjust the power supply control signal to change a voltage level or a duration of the power pulse responsive to a comparison between the calibration value and a value proportional to the measured resistance of the calibration resistor; 
 calculate a temperature of the adjustable resistance network responsive to the measured resistance of the calibration resistor; 
 determine a calculated temperature rise responsive to the calculated temperature of the adjustable resistance network; 
 compare the calculated temperature rise to a calibration temperature rise indicated by the calibration value stored in the non-volatile memory; and 
 adjust the power pulse responsive to the comparison. 
   
     
     
         2 . The system of  claim 1 , wherein:
 the interface circuitry includes switches configured to, when activated, electrically isolate the calibration resistor from the adjustable resistance network; and   the processor is configured to provide a calibration signal to activate the switches.   
     
     
         3 . The system of  claim 1 , wherein the adjustable resistance network includes first resistance segments, and the calibration resistor includes second resistance segments thermally coupled to the first resistance segments. 
     
     
         4 . The system of  claim 3 , wherein the first resistance segments are disposed in a layer of an integrated circuit, and the second resistance segments are also disposed in the layer. 
     
     
         5 . The system of  claim 3 , wherein the first resistance segments are disposed in first layers of an integrated circuit, and the second resistance segments are disposed in second layers of the integrated circuit, in which the first layers are adjacent or proximate the second layers. 
     
     
         6 . The system of  claim 3 , wherein the first resistance segments are members of an array of physical resistance segments fabricated from a resistive material, and the second resistance segments are members of the array of physical resistance segments. 
     
     
         7 . The system of  claim 3 , wherein the second resistance segments belong to the first resistance segments. 
     
     
         8 . The system of  claim 3 , wherein the second resistance segments do not belong to the first resistance segments. 
     
     
         9 . A method, comprising:
 instructing a power supply to provide a power pulse to a heater;   measuring a resistance of a calibration resistor that is thermally coupled to an adjustable resistance network;   obtaining a calibration value for the calibration resistor, wherein the calibration value is proportional to a calibration temperature rise; and   adjusting the power pulse based on a comparison between the calibration value and a value proportional to the measured resistance.   
     
     
         10 . The method of  claim 9 , further comprising:
 responsive to the measured resistance, determining a calculated temperature rise of the adjustable resistance network due to heat from the heater;   comparing the calculated temperature rise with the calibration value; and   selectively modifying the power pulse responsive to a comparison between the calculated temperature rise and the calibration temperature rise.   
     
     
         11 . The method of  claim 10 , further comprising modifying a voltage level of the power pulse responsive to a product of the voltage level and the calibration temperature rise divided by the calculated temperature rise. 
     
     
         12 . The method of  claim 10 , further comprising determining a second voltage level (V mod ) of the power pulse responsive to a relationship of a first voltage level (V old ) of the power pulse, the calibration temperature rise (ΔT exp ), the calculated temperature rise (ΔT est ), and a damping constant k having a value between 0 and 1, the relationship being V mod =V old (1+k*(ΔT exp /ΔT est −1)). 
     
     
         13 . The method of  claim 10 , further comprising, selectively modifying a duration of the power pulse responsive to the comparison between the calculated temperature rise and the calibration temperature rise. 
     
     
         14 . The method of  claim 9 , further comprising:
 determining the calibration value by:
 measuring a first resistance of the calibration resistor at a first temperature; 
 increasing a temperature of the adjustable resistance network to a second temperature; and 
 measuring a second resistance of the calibration resistor at the second temperature; and 
 storing a value derived from the second resistance as the calibration value. 
   
     
     
         15 . The method of  claim 14 , further comprising:
 determining a calibration temperature rise of the adjustable resistance network in response to heat generated by the heater based on the measured resistance; and   storing the calibration temperature rise as the calibration value.   
     
     
         16 . The method of  claim 9 , further comprising providing a calibration signal that activates switches to electrically isolate the calibration resistor from the adjustable resistance network prior to measuring the resistance.