US2023179162A1PendingUtilityA1

Differential stacked power amplifier with inductive gain boosting

Assignee: GLOBALFOUNDRIES US INCPriority: Dec 8, 2021Filed: Dec 8, 2021Published: Jun 8, 2023
Est. expiryDec 8, 2041(~15.4 yrs left)· nominal 20-yr term from priority
H03F 2200/451H03F 3/45179H03G 3/3042H03G 2201/103H03F 3/45188H03F 1/565H03F 3/195Y02B70/10H03F 3/193H03F 1/223H03F 3/245H03F 3/211H03F 2203/45051H03F 2203/45056H03F 3/45183H03F 1/347H03F 2203/45034H03F 3/265H03F 2203/45731H03F 2203/45318H03F 2203/45481H03F 2203/45621H03F 2200/534H03F 2200/541
49
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

An exemplary structure has an output stage; a driver stage; and a power stage connected between the driver stage and the output stage. The power stage includes a first transistor and a second transistor connected in series between the driver stage and the output stage. The power stage also includes a third transistor and a fourth transistor connected in series between the driver stage and the output stage. An inductor has a first terminal electrically connected to a first node between the first transistor and the second transistor and a second terminal electrically connected to a second node between the third transistor and the fourth transistor. The inductor is configured to provide impedance matching between common-gate stages of the power stage.

Claims

exact text as granted — not AI-modified
1 . A structure, comprising:
 an output stage;   a driver stage; and   a power stage connected between the driver stage and the output stage, wherein the power stage comprises:
 a first transistor and a second transistor connected in series between the driver stage and the output stage; 
 a third transistor and a fourth transistor connected in series between the driver stage and the output stage; and 
   an inductor having a first terminal electrically connected to a first node between the first transistor and the second transistor and a second terminal electrically connected to a second node between the third transistor and the fourth transistor.   
     
     
         2 . The structure according to  claim 1 ,
 wherein the first transistor has a first gate, the second transistor has a second gate, the third transistor has a third gate, and the fourth transistor has a fourth gate,   wherein the first gate and the third gate receive a first gate voltage such that the first transistor and the third transistor comprise a first common-gate stage of the power stage, and   wherein the second gate and the fourth gate receive a second gate voltage such that the second transistor and the fourth transistor comprise a second common-gate stage of the power stage.   
     
     
         3 . The structure according to  claim 1 , wherein the driver stage comprises:
 a fifth transistor connected in series between the first transistor and ground, wherein the fifth transistor has a fifth gate; and   a sixth transistor connected in series between the third transistor and ground, wherein the sixth transistor has a sixth gate;   wherein the fifth gate is electrically connected to a junction between the third transistor and the sixth transistor, and   wherein the sixth gate is electrically connected to a junction between the first transistor and the fifth transistor.   
     
     
         4 . The structure according to  claim 3 , wherein the driver stage further comprises:
 a first neutralization capacitor connected between the fifth gate and the junction between the third transistor and the sixth transistor; and   a second neutralization capacitor connected between the sixth gate and the junction between the first transistor and the fifth transistor.   
     
     
         5 . The structure according to  claim 3 , further comprising an input stage, wherein the driver stage is connected between the input stage and the power stage. 
     
     
         6 . The structure according to  claim 5 , wherein the input stage comprises a radio frequency input transformer comprising:
 a primary winding connected between a radio frequency input and ground; and   a secondary winding connected between the fifth gate and the sixth gate.   
     
     
         7 . The structure according to  claim 1 , wherein the output stage comprises a radio frequency output transformer comprising:
 a primary winding connected between the second transistor and the fourth transistor; and   a secondary winding connected between a radio frequency output and ground.   
     
     
         8 . A structure comprising:
 an output stage;   a driver stage; and   a power stage connected between the driver stage and the output stage, wherein the power stage comprises:
 a first transistor and a second transistor connected in series between the driver stage and the output stage; 
 a third transistor and a fourth transistor connected in series between the driver stage and the output stage; and 
 an inductor having a first terminal electrically connected to a first node between the first transistor and the second transistor and a second terminal electrically connected to a second node between the third transistor and the fourth transistor, 
   wherein the first transistor has a first gate, the second transistor has a second gate, the third transistor has a third gate and the fourth transistor has a fourth gate,   wherein the first gate and the third gate receive a first gate voltage such that the first transistor and the second transistor comprise a first common-gate stage of the power stage,   wherein the second gate and the fourth gate receive a second gate voltage such that the second transistor and the fourth transistor comprise a second common-gate stage of the power stage, and   wherein the inductor is configured to provide impedance matching between the first common-gate stage and the second common-gate stage.   
     
     
         9 . The structure according to  claim 8 , wherein the first transistor, the second transistor, the third transistor, and the fourth transistor comprise n-type field effect transistors. 
     
     
         10 . The structure according to  claim 8 , wherein the driver stage comprises:
 a fifth transistor connected in series between the first transistor and ground, wherein the fifth transistor has a fifth gate; and   a sixth transistor connected in series between the third transistor and ground, wherein the sixth transistor has a sixth gate,   wherein the fifth gate is electrically connected to a junction between the third transistor and the sixth transistor, and   wherein the sixth gate is electrically connected to a junction between the first transistor and the fifth transistor.   
     
     
         11 . The structure according to  claim 10 , wherein the driver stage further comprises:
 a first neutralization capacitor connected between the fifth gate and the junction between the third transistor and the sixth transistor; and   a second neutralization capacitor connected between the sixth gate and the junction between the first transistor and the fifth transistor.   
     
     
         12 . The structure according to  claim 10 , further comprising an input stage, wherein the driver stage is connected between the input stage and the power stage. 
     
     
         13 . The structure according to  claim 12 , wherein the input stage comprises a radio frequency input transformer comprising:
 a primary winding connected between a radio frequency input and ground; and   a secondary winding connected between the fifth gate and the sixth gate.   
     
     
         14 . The structure according to  claim 8 , wherein the output stage comprises a radio frequency output transformer comprising:
 a primary winding connected between the second transistor and the fourth transistor; and   a secondary winding connected between a radio frequency output and ground.   
     
     
         15 . A structure comprising: an output stage;
 a driver stage; and   a power stage connected between the driver stage and the output stage, wherein the power stage comprises:
 a first transistor and a second transistor connected in series between the driver stage and the output stage; 
 a third transistor and a fourth transistor connected in series between the driver stage and the output stage; and 
   an inductor having a first terminal electrically connected to a first node between the first transistor and the second transistor and a second terminal electrically connected to a second node between the third transistor and the fourth transistor,   wherein the first transistor, the second transistor, the third transistor, and the fourth transistor comprise n-type field effect transistors,   wherein the first transistor has a first gate, the second transistor has a second gate, the third transistor has a third gate and the fourth transistor has a fourth gate,   wherein the first gate and the third gate receive a first gate voltage such that the first transistor and the second transistor comprise a first common-gate stage of the power stage,   wherein the second gate and the fourth gate receive a second gate voltage such that the second transistor and the fourth transistor comprise a second common-gate stage of the power stage, and   wherein the inductor is configured to provide impedance matching between the first common-gate stage and the second common-gate stage.   
     
     
         16 . The structure according to  claim 15 , wherein the driver stage comprises:
 a fifth transistor connected in series between the first transistor and ground, wherein the fifth transistor has a fifth gate; and   a sixth transistor connected in series between the third transistor and ground, wherein the sixth transistor has a sixth gate,   wherein the fifth gate is electrically connected to a junction between the third transistor and the sixth transistor, and   wherein the sixth gate is electrically connected to a junction between the first transistor and the fifth transistor.   
     
     
         17 . The structure according to  claim 16 , wherein the driver stage further comprises:
 a first neutralization capacitor connected between the fifth gate and the junction between the third transistor and the sixth transistor; and   a second neutralization capacitor connected between the sixth gate and the junction between the first transistor and the fifth transistor.   
     
     
         18 . The structure according to  claim 16 , further comprising an input stage, wherein the driver stage is connected between the input stage and the power stage. 
     
     
         19 . The structure according to  claim 18 , wherein the input stage comprises a radio frequency input transformer comprising:
 a primary winding connected between a radio frequency input and ground; and a secondary winding connected between the fifth gate and the sixth gate.   
     
     
         20 . The structure according to  claim 15 , wherein the output stage comprises a radio frequency output transformer comprising:
 a primary winding connected between the second transistor and the fourth transistor; and   a secondary winding connected between a radio frequency output and ground.

Join the waitlist — get patent alerts

Track US2023179162A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.