Fabrication method of forming silicon carbide mosfet

Abstract

A fabrication method of forming a silicon carbide MOSFET is provided. The fabrication method includes the step of providing a semiconductor substrate. A P-well region is formed by implanting the semiconductor substrate through the P-well mask. A spacer is disposed on sidewall of the P-well mask and the P-well region is implanted to form a P-plus layer and an N-plus layer. A gate oxide layer, a poly gate and a first interlayer dielectric layer are formed on the semiconductor substrate. The first interlayer dielectric layer is etched to form an opening and the opening exposes the P-plus layer. A metal layer is disposed to cover the opening and the first interlayer dielectric layer.

What is claimed is: 
     
         1 . A fabrication method of forming a silicon carbide MOSFET, the fabrication method comprising:
 providing a semiconductor substrate, the semiconductor substrate having a silicon carbide layer;   providing a P-well mask on the semiconductor substrate and implanting the semiconductor substrate through the P-well mask to form a P-well region;   disposing a spacer on sidewall of the P-well mask and implanting the P-well region through the spacer to form a P-plus layer and an N-plus layer, the N-plus layer being disposed on the P-plus layer;   removing the P-well mask and the spacer and disposing a gate oxide layer on the semiconductor substrate by an oxidation process;   disposing a polysilicon layer on the gate oxide layer;   etching the polysilicon layer through a gate mask to define a poly gate;   disposing a first interlayer dielectric layer on the poly gate and the substrate, and the first interlayer dielectric layer covering the poly gate;   etching the first interlayer dielectric layer to form an opening, the opening exposing the P-plus layer;   disposing a metal layer to cover the opening and the first interlayer dielectric layer.   
     
     
         2 . The fabrication method of  claim 1 , wherein a junction field effect transistor layer is formed on the silicon carbide layer by a junction field effect transistor implant. 
     
     
         3 . The fabrication method of  claim 1 , wherein a P-well mask layer is disposed on the silicon carbide layer and the P-well mask layer is etched to form the P-well mask. 
     
     
         4 . The fabrication method of  claim 1 , wherein the P-plus layer and the N-plus layer are disposed within the P-well region. 
     
     
         5 . The fabrication method of  claim 1 , wherein the silicon carbide layer is disposed on an oxide layer. 
     
     
         6 . The fabrication method of  claim 5 , wherein a backside process is conducted to remove the oxide layer after removing the P-well mask and the spacer. 
     
     
         7 . The fabrication method of  claim 1 , wherein an anneal process is conducted after every implant process. 
     
     
         8 . The fabrication method of  claim 1 , wherein the first interlayer dielectric layer comprises oxide dielectric material. 
     
     
         9 . The fabrication method of  claim 1 , wherein the first interlayer dielectric layer comprises nitride dielectric material. 
     
     
         10 . The fabrication method of  claim 1 , wherein a passivation deposition process is conducted after disposing a metal layer. 
     
     
         11 . A fabrication method of forming a silicon carbide MOSFET, the fabrication method comprising:
 providing a semiconductor substrate, the semiconductor substrate having a silicon carbide layer and the silicon carbide layer being disposed on an oxide layer;   forming a junction field effect transistor layer on the silicon carbide layer;   providing a P-well mask on the junction field effect transistor layer and implanting the semiconductor substrate through the P-well mask to form a P-well region;   disposing a spacer on sidewall of the P-well mask and implanting the P-well region through the spacer to form a P-plus layer and an N-plus layer, the N-plus layer being disposed on the P-plus layer;   removing the P-well mask and the spacer and conducting a backside process to remove the oxide layer;   disposing a gate oxide layer and a polysilicon layer, the gate oxide layer being disposed on the semiconductor substrate and the polysilicon layer being disposed on the gate oxide layer;   etching the polysilicon layer to define a poly gate and disposing a first interlayer dielectric layer on the poly gate;   etching the first interlayer dielectric layer and the gate oxide layer to form an opening, the opening exposing the P-plus layer;   disposing a metal layer, the metal layer covering the opening and the first interlayer dielectric layer.   
     
     
         12 . The fabrication method of  claim 11 , wherein a junction field effect transistor implant is conducted to form the junction field effect transistor layer on the silicon carbide layer. 
     
     
         13 . The fabrication method of  claim 11 , wherein a P-well mask layer is disposed on the junction field effect transistor layer and the P-well mask layer is etched to form the P-well mask. 
     
     
         14 . The fabrication method of  claim 11 , wherein the P-plus layer and the N-plus layer are disposed within the P-well region. 
     
     
         15 . The fabrication method of  claim 11 , wherein an anneal process is conducted after every implant process. 
     
     
         16 . The fabrication method of  claim 11 , wherein the first interlayer dielectric layer comprises oxide dielectric material. 
     
     
         17 . The fabrication method of  claim 11 , wherein the first interlayer dielectric layer comprises nitride dielectric material. 
     
     
         18 . The fabrication method of  claim 11 , wherein a passivation deposition process is conducted after disposing a metal layer. 
     
     
         19 . The fabrication method of  claim 11 , wherein the opening comprises a rectangular shape, a trapezoid shape or a rounded shape. 
     
     
         20 . The fabrication method of  claim 11 , wherein a Ni deposition process is conducted to form a stripe structure on the opening.