Secondary electron generating composition
Abstract
The present invention relates to a resist composition, especially for use in the production of electronic components via electron beam lithography. In addition to the usual base polymeric component (resist polymer), a secondary electron generator is included in resist compositions of the invention in order to promote secondary electron generation. This unique combination of components increases the exposure sensitivity of resists in a controlled fashion which facilitates the effective production of high-resolution patterned substrates (and consequential electronic components), but at much higher write speeds.
Claims
exact text as granted — not AI-modified1 - 38 . (canceled)
39 . A method of manufacturing a lithographic mask, the method comprising:
i) applying a resist coating to a substrate; ii) exposing part(s) of the resist coating to radiation to provide an exposed resist coating; and iii) developing the exposed resist coating to generate a resist pattern layer, the resist pattern layer comprising: developer-insoluble coating portions of the resist coating; and an array of grooves extending through the resist pattern layer;
wherein the resist coating is an optionally dried and/or cured resist composition, wherein the resist composition comprises:
(i) a secondary electron generator, which increases the radiation-sensitivity of the resist composition, comprising a compound having an effective atomic number (Z eff ) greater than or equal to 40; and
(ii) a base component which is a radiation-sensitive resist material that undergoes a change upon exposure to radiation, such that radiation-exposed base component has different solubility properties to unexposed base component;
wherein the effective atomic number (Z eff ) is calculated as:
Z eff =Σα i Z i
where Z i is the atomic number of the ith element in the compound, and α i is the fraction of the sum total of the atomic numbers of all atoms in the compound constituted by said ith element; and
wherein the secondary electron generator comprises a d-block, p-block, or f-block metal species.
40 . The method as claimed in claim 39 , further comprising the step of:
iv) selectively modifying the substrate, substrate surface, or part(s) thereof, underlying the resist pattern layer.
41 . The method as claimed in claim 40 , further comprising the step of:
v) removing the resist pattern layer to provide a modified substrate.
42 . The method as claimed in claim 40 , wherein selectively modifying the substrate comprises generating opaque regions within an otherwise transparent substrate or generating transparent regions within an otherwise opaque substrate.
43 . The method as claimed in claim 42 , wherein the transparent substrate or the transparent regions generated within an otherwise opaque substrate is transparent to electron beam radiation.
44 . The method as claimed in claim 42 , wherein the transparent substrate or the transparent regions generated within an otherwise opaque substrate is transparent to ultraviolet radiation having a wavelength between 10 and 400 nm.
45 . The method as claimed in claim 39 , wherein the substrate is a lithographic plate.
46 . The method as claimed in claim 39 , wherein the resist composition is an electron beam resist composition and/or a photoresist composition.
47 . The method as claimed in claim 39 , wherein the secondary electron generator or compound(s) thereof has a Z eff of at least 20 units higher than the resist material, a density greater than that of the resist material, or a density greater than or equal to 2.5 g/cm 3 .
48 . The method as claimed in claim 39 , wherein the secondary electron generator is or comprises a metal compound comprising a metal species having an oxidation state of +1 or higher and an atomic number (Z) greater than or equal to 57.
49 . The method as claimed in claim 39 , wherein the secondary electron generator is soluble in the resist composition.
50 . The method as claimed in claim 39 , wherein the resist material is or comprises a compound having an effective atomic number (Z eff ) less than or equal to 10.
51 . The method as claimed in claim 39 , wherein the resist composition is a resist composition comprising:
(i) a resist material having an effective atomic number (Z eff ) less than or equal to 15 and having a density less than or equal to 2 g/cm 3 ; (ii) a secondary electron generator comprising a compound having an effective atomic number (Z eff ) greater than or equal to 40 and a density greater than or equal to 2.5 g/cm 3 ; and (iii) optionally a cross-linking agent;
wherein the secondary electron generator is soluble in the resist composition and the resist composition is a solution.
52 . The method as claimed in claim 39 , wherein the resist composition is free of any particulate matter.
53 . The method as claimed in claim 39 , wherein the resist material has a density less than or equal to 2.0 g/cm 3 , and a Z eff less than or equal to 15.
54 . The method as claimed in claim 39 , wherein the secondary electron generator is a metal halide.
55 . The method as claimed in claim 54 , wherein the metal halide is part of a complex.
56 . The method as claimed in claim 39 , wherein the secondary electron generator is a gold-based compound or a mercury-based compound.
57 . The method as claimed in claim 39 , wherein the resist material acts as a vehicle for the secondary electron generator.
58 . The method as claimed in claim 39 , wherein the resist material is or comprises a non-polymeric complex.
59 . The method as claimed in claim 39 , wherein the Z eff excludes any solvates having a boiling point less than or equal to 150° C. at 100 kPa pressure.
60 . A lithographic mask obtainable by the method as claimed in claim 39 .
61 . A method of manufacturing a lithographic product using a lithographic mask formed by the method of claim 39 , the method comprising:
i) applying a resist coating to a substrate; ii) exposing part(s) of the resist coating, via a lithographic mask formed by the method of claim 39 , to radiation to provide an exposed resist coating; and iii) developing the exposed resist coating to generate a resist pattern layer, the resist pattern layer comprising: developer-insoluble coating portions of the resist coating (i.e. ridges); and an array of grooves extending through the resist pattern layer;
wherein the resist coating is either a resist coating as defined in claim 39 or an alternative resist coating.
62 . The method as claimed in claim 61 , further comprising the step of:
iv) selectively modifying the substrate, substrate surface, or part(s) thereof, underlying the resist pattern layer;
63 . The method as claimed in claim 62 , further comprising the step of:
v) removing the resist pattern layer to provide a modified substrate.
64 . The method as claimed in claim 63 , further comprising the step of:
vi) repeating, one or more times, step iv) and/or steps i)-v) (optionally with an alternative resist coating, for example, where the resist coating of the invention is an eBeam resist coating the alternative resist coating may be a photoresist instead; and optionally using alternative radiation during exposure, for example, where the primary source of radiation is an electron beam, the alternative radiation may instead be visible or ultraviolet light) upon the modified substrate.
65 . The method as claimed in claim 61 , wherein the method produces an integrated circuit die or an integrated circuit wafer comprising a plurality of integrated circuit dice, wherein the method optionally comprises separating an integrated circuit die from the integrated circuit wafer.
66 . The method as claimed in claim 65 , wherein the substrate is a silicon substrate.
67 . The method as claimed in claim 65 , wherein the method comprises conductively interconnecting electronic components of the or each die with conductor(s) (if not already performed during one or more substrate/substrate-surface modifying steps) to provide an integrated circuit with external contact terminals.
68 . The method as claimed in claim 65 , wherein the method produces an integrated circuit package by:
a. attaching the integrated circuit die to a package substrate, wherein the package substrate comprises electrical contacts, each of the electrical contacts being optionally connected or connectable to a corresponding pin; b. conductively connecting each of the external contact terminals of the integrated circuit die to corresponding electrical contacts of the package substrate; c. optionally (and if necessary) connecting the electrical contacts of the package substrate to corresponding pins; and d. encapsulating the integrated circuit die.
69 . The method as claimed in claim 68 , wherein the method produces a circuit board by conductively connecting the integrated circuit package to a circuit board.
70 . The method as claimed in claim 69 , wherein the method produces an electronic device by incorporating the circuit board into an electronic device.
71 . The method as claimed in claim 61 , wherein the radiation is ultraviolet radiation having a wavelength between 10 and 400 nm, and the lithographic mask is a photomask.Join the waitlist — get patent alerts
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