US2023298935A1PendingUtilityA1

Semiconductor device including polysilicon structures and method of making

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Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: May 26, 2017Filed: May 24, 2023Published: Sep 21, 2023
Est. expiryMay 26, 2037(~10.9 yrs left)· nominal 20-yr term from priority
H10P 32/1414H10P 32/171H10P 14/6686H10D 64/01308H10D 64/01306H10W 20/074H10D 64/662H10D 1/712H10B 10/12H01L 21/76829H01L 21/28035H01L 21/2257H01L 21/02216H01L 28/84H01L 29/4925H01L 21/28044
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Claims

Abstract

A semiconductor device includes a first polysilicon structure, wherein the first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness. The semiconductor device includes a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size different from the first grain size.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a first polysilicon structure, wherein the first polysilicon structure has a first grain size;   a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness; and   a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size different from the first grain size.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the second grain size is smaller than the first grain size. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the first barrier layer comprises:
 a central region; and   a peripheral region, wherein the peripheral region is closer to an edge of the semiconductor device than the centration region, and the peripheral region has the non-uniform thickness.   
     
     
         4 . The semiconductor device of  claim 3 , wherein a thickness of the peripheral region increases as a distance from the edge of the semiconductor device decreases. 
     
     
         5 . The semiconductor device of  claim 3 , wherein the central region has a uniform thickness. 
     
     
         6 . The semiconductor device of  claim 1 , further comprising dopants in each of the first polysilicon structure and the second polysilicon structure. 
     
     
         7 . The semiconductor device of  claim 6 , wherein a uniformity of distribution of the dopants in the first polysilicon structure is different from a uniformity of distribution of the dopants in the second poly silicon structure. 
     
     
         8 . The semiconductor device of  claim 6 , wherein the dopants are in the first barrier layer. 
     
     
         9 . The semiconductor device of  claim 6 , wherein the dopants are along grain boundaries in the first polysilicon structure. 
     
     
         10 . A semiconductor device comprising:
 a first polysilicon structure;   a second polysilicon structure over the first polysilicon structure; and   dopants in each of the first polysilicon structure, wherein a uniformity of a distribution of dopants in the first polysilicon structure is different from a uniformity of a distribution of dopants in the second polysilicon structure.   
     
     
         11 . The semiconductor device of  claim 10 , further comprising a first barrier layer between the first polysilicon structure and the second polysilicon structure. 
     
     
         12 . The semiconductor device of  claim 11 , wherein the first barrier layer has a uniform thickness. 
     
     
         13 . The semiconductor device of  claim 11 , wherein the first barrier layer has a non-uniform thickness. 
     
     
         14 . The semiconductor device of  claim 11 , wherein the dopants are in the first barrier layer. 
     
     
         15 . The semiconductor device of  claim 10 , wherein the first polysilicon structure has a first grain size, the second polysilicon structure has a second grain size different from the first grain size. 
     
     
         16 . A method of making a semiconductor device, the method comprising:
 forming a barrier layer over a first polysilicon layer;   depositing a second polysilicon layer over the barrier layer; and   increasing a grain size of the first polysilicon layer simultaneously with depositing the second polysilicon layer.   
     
     
         17 . The method of  claim 17 , wherein forming the barrier layer comprises forming the barrier layer having a uniform thickness. 
     
     
         18 . The method of  claim 17 , wherein forming the barrier layer comprises forming the barrier layer having a non-uniform thickness. 
     
     
         19 . The method of  claim 17 , further comprises doping the first polysilicon layer and the second poly silicon layer. 
     
     
         20 . The method of  claim 19 , further comprising doping the barrier layer.

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